layerscape: update kernel to LSDK-20.04-V5.4-update-290520

Update kernel from LSDK-20.04-V5.4 to LSDK-20.04-V5.4-update-290520.
Only two patches added for Layerscape.

LSDK kernel link
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

1 files changed, 85 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-5.4/818-thermal-0004-thermal-qoriq-Update-the-settings-for-TMUv2.patch b/target/linux/layerscape/patches-5.4/818-thermal-0004-thermal-qoriq-Update-the-settings-for-TMUv2.patch
new file mode 100644
index 0000000000..9534bdc3dd
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/818-thermal-0004-thermal-qoriq-Update-the-settings-for-TMUv2.patch
@@ -0,0 +1,85 @@
+From da5a7765a20d34508036ba8ed1db87e546abcf4b Mon Sep 17 00:00:00 2001
+From: Yuantian Tang <andy.tang@nxp.com>
+Date: Mon, 25 May 2020 17:33:22 +0800
+Subject: [PATCH] thermal: qoriq: Update the settings for TMUv2
+
+For TMU v2, TMSAR registers need to be set properly to get the
+accurate temperature values.
+Also the temperature read needs to be converted to degree Celsius
+since it is in degrees Kelvin.
+
+Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
+---
+ drivers/thermal/qoriq_thermal.c | 21 +++++++++++++++++++--
+ 1 file changed, 19 insertions(+), 2 deletions(-)
+
+diff --git a/drivers/thermal/qoriq_thermal.c b/drivers/thermal/qoriq_thermal.c
+index ba7d6105a..8b371fd3d 100644
+--- a/drivers/thermal/qoriq_thermal.c
++++ b/drivers/thermal/qoriq_thermal.c
+@@ -23,6 +23,7 @@
+ #define TMTMIR_DEFAULT	0x0000000f
+ #define TIER_DISABLE	0x0
+ #define TEUMR0_V2		0x51009c00
++#define TMSARA_V2		0xe
+ #define TMU_VER1		0x1
+ #define TMU_VER2		0x2
+ 
+@@ -35,6 +36,13 @@ struct qoriq_tmu_site_regs {
+ 	u8 res0[0x8];
+ };
+ 
++struct qoriq_tmu_tmsar {
++	u32 res0;
++	u32 tmsar;
++	u32 res1;
++	u32 res2;
++};
++
+ struct qoriq_tmu_regs_v1 {
+ 	u32 tmr;		/* Mode Register */
+ 	u32 tsr;		/* Status Register */
+@@ -95,7 +103,9 @@ struct qoriq_tmu_regs_v2 {
+ 	u32 tscfgr;	/* Sensor Configuration Register */
+ 	u8 res6[0x78];
+ 	struct qoriq_tmu_site_regs site[SITES_MAX];
+-	u8 res7[0x9f8];
++	u8 res10[0x100];
++	struct qoriq_tmu_tmsar tmsar[16];
++	u8 res7[0x7f8];
+ 	u32 ipbrr0;		/* IP Block Revision Register 0 */
+ 	u32 ipbrr1;		/* IP Block Revision Register 1 */
+ 	u8 res8[0x300];
+@@ -158,7 +168,10 @@ static int tmu_get_temp(void *p, int *temp)
+ 	u32 val;
+ 
+ 	val = tmu_read(qdata, &qdata->regs->site[qsensor->id].tritsr);
+-	*temp = (val & 0xff) * 1000;
++	if (qdata->ver == TMU_VER1)
++		*temp = (val & 0xff) * 1000;
++	else
++		*temp = (val & 0x1ff) * 1000 - 273150;
+ 
+ 	return 0;
+ }
+@@ -319,6 +332,8 @@ static int qoriq_tmu_calibration(struct platform_device *pdev)
+ 
+ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
+ {
++	int i;
++
+ 	/* Disable interrupt, using polling instead */
+ 	tmu_write(data, TIER_DISABLE, &data->regs->tier);
+ 
+@@ -328,6 +343,8 @@ static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
+ 	} else {
+ 		tmu_write(data, TMTMIR_DEFAULT, &data->regs_v2->tmtmir);
+ 		tmu_write(data, TEUMR0_V2, &data->regs_v2->teumr0);
++		for (i = 0; i < 7; i++)
++			tmu_write(data, TMSARA_V2, &data->regs_v2->tmsar[i].tmsar);
+ 	}
+ 
+ 	/* Disable monitoring */
+-- 
+2.17.1
+