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author | Daniel Golle <daniel@makrotopia.org> | 2022-03-21 01:16:48 +0000 |
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committer | Daniel Golle <daniel@makrotopia.org> | 2022-03-21 13:11:56 +0000 |
commit | 786bf7fdaca4c75e7eba6e9aa3a8b5775fd21186 (patch) | |
tree | 926fecb2b1f6ce1e42ba7ef4c7aab8e68dfd214c /target/linux/layerscape/patches-5.4/812-pcie-0011-PCI-mobiveil-Add-8-bit-and-16-bit-CSR-register-acces.patch | |
parent | 9470160c350d15f765c33d6c1db15d6c4709a64c (diff) | |
download | upstream-786bf7fdaca4c75e7eba6e9aa3a8b5775fd21186.tar.gz upstream-786bf7fdaca4c75e7eba6e9aa3a8b5775fd21186.tar.bz2 upstream-786bf7fdaca4c75e7eba6e9aa3a8b5775fd21186.zip |
kernel: delete Linux 5.4 config and patches
As the upcoming release will be based on Linux 5.10 only, remove all
kernel configuration as well as patches for Linux 5.4.
There were no targets still actively using Linux 5.4.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 3a14580411adfb75f9a44eded9f41245b9e44606)
Diffstat (limited to 'target/linux/layerscape/patches-5.4/812-pcie-0011-PCI-mobiveil-Add-8-bit-and-16-bit-CSR-register-acces.patch')
-rw-r--r-- | target/linux/layerscape/patches-5.4/812-pcie-0011-PCI-mobiveil-Add-8-bit-and-16-bit-CSR-register-acces.patch | 47 |
1 files changed, 0 insertions, 47 deletions
diff --git a/target/linux/layerscape/patches-5.4/812-pcie-0011-PCI-mobiveil-Add-8-bit-and-16-bit-CSR-register-acces.patch b/target/linux/layerscape/patches-5.4/812-pcie-0011-PCI-mobiveil-Add-8-bit-and-16-bit-CSR-register-acces.patch deleted file mode 100644 index ee8c519520..0000000000 --- a/target/linux/layerscape/patches-5.4/812-pcie-0011-PCI-mobiveil-Add-8-bit-and-16-bit-CSR-register-acces.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 7e92994ec22c9d337f6012ac913e7958012ad52e Mon Sep 17 00:00:00 2001 -From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> -Date: Tue, 25 Jun 2019 09:09:28 +0000 -Subject: [PATCH] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors - -There are some 8-bit and 16-bit registers in PCIe configuration -space, so add these accessors accordingly. - -Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> -Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com> -Reviewed-by: Subrahmanya Lingappa <l.subrahmanya@mobiveil.co.in> ---- - drivers/pci/controller/mobiveil/pcie-mobiveil.h | 20 ++++++++++++++++++++ - 1 file changed, 20 insertions(+) - ---- a/drivers/pci/controller/mobiveil/pcie-mobiveil.h -+++ b/drivers/pci/controller/mobiveil/pcie-mobiveil.h -@@ -182,9 +182,29 @@ static inline u32 csr_readl(struct mobiv - return csr_read(pcie, off, 0x4); - } - -+static inline u32 csr_readw(struct mobiveil_pcie *pcie, u32 off) -+{ -+ return csr_read(pcie, off, 0x2); -+} -+ -+static inline u32 csr_readb(struct mobiveil_pcie *pcie, u32 off) -+{ -+ return csr_read(pcie, off, 0x1); -+} -+ - static inline void csr_writel(struct mobiveil_pcie *pcie, u32 val, u32 off) - { - csr_write(pcie, val, off, 0x4); - } - -+static inline void csr_writew(struct mobiveil_pcie *pcie, u32 val, u32 off) -+{ -+ csr_write(pcie, val, off, 0x2); -+} -+ -+static inline void csr_writeb(struct mobiveil_pcie *pcie, u32 val, u32 off) -+{ -+ csr_write(pcie, val, off, 0x1); -+} -+ - #endif /* _PCIE_MOBIVEIL_H */ |