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| author | Yangbo Lu <yangbo.lu@nxp.com> | 2020-04-10 10:47:05 +0800 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2020-05-07 12:53:06 +0200 |
| commit | cddd4591404fb4c53dc0b3c0b15b942cdbed4356 (patch) | |
| tree | 392c1179de46b0f804e3789edca19069b64e6b44 /target/linux/layerscape/patches-5.4/812-pcie-0003-PCI-dwc-fix-the-msi-failure-after-pm-operations.patch | |
| parent | d1d2c0b5579ea4f69a42246c9318539d61ba1999 (diff) | |
| download | upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.gz upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.bz2 upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.zip | |
layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/
For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.
The patches are sorted into the following categories:
301-arch-xxxx
302-dts-xxxx
303-core-xxxx
701-net-xxxx
801-audio-xxxx
802-can-xxxx
803-clock-xxxx
804-crypto-xxxx
805-display-xxxx
806-dma-xxxx
807-gpio-xxxx
808-i2c-xxxx
809-jailhouse-xxxx
810-keys-xxxx
811-kvm-xxxx
812-pcie-xxxx
813-pm-xxxx
814-qe-xxxx
815-sata-xxxx
816-sdhc-xxxx
817-spi-xxxx
818-thermal-xxxx
819-uart-xxxx
820-usb-xxxx
821-vfio-xxxx
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/812-pcie-0003-PCI-dwc-fix-the-msi-failure-after-pm-operations.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/812-pcie-0003-PCI-dwc-fix-the-msi-failure-after-pm-operations.patch | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/812-pcie-0003-PCI-dwc-fix-the-msi-failure-after-pm-operations.patch b/target/linux/layerscape/patches-5.4/812-pcie-0003-PCI-dwc-fix-the-msi-failure-after-pm-operations.patch new file mode 100644 index 0000000000..235daca71c --- /dev/null +++ b/target/linux/layerscape/patches-5.4/812-pcie-0003-PCI-dwc-fix-the-msi-failure-after-pm-operations.patch @@ -0,0 +1,32 @@ +From f5db8274c8d6c86812fd2036ae49153d3ade3eaa Mon Sep 17 00:00:00 2001 +From: richard zhu <hongxing.zhu@nxp.com> +Date: Wed, 6 Nov 2019 15:11:36 +0800 +Subject: [PATCH] PCI: dwc: fix the msi failure after pm operations + +The controller may be powered off (Link is in L3) during the suspend +mode. The MSI_ADDR would be missed after resume and MSI function +would be failed. +Re-store MSI_ADDR to fix the MSI failure after PM operations. + +Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> +Acked-by: Fugang Duan <fugang.duan@nxp.com> +Acked-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> +--- + drivers/pci/controller/dwc/pcie-designware-host.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/pci/controller/dwc/pcie-designware-host.c ++++ b/drivers/pci/controller/dwc/pcie-designware-host.c +@@ -654,6 +654,12 @@ void dw_pcie_setup_rc(struct pcie_port * + dw_pcie_setup(pci); + + if (!pp->ops->msi_host_init) { ++ /* Program the msi_data */ ++ dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_LO, 4, ++ lower_32_bits((u64)pp->msi_data)); ++ dw_pcie_wr_own_conf(pp, PCIE_MSI_ADDR_HI, 4, ++ upper_32_bits((u64)pp->msi_data)); ++ + num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; + + /* Initialize IRQ Status array */ |