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| author | Yangbo Lu <yangbo.lu@nxp.com> | 2020-04-10 10:47:05 +0800 |
|---|---|---|
| committer | Petr Štetiar <ynezz@true.cz> | 2020-05-07 12:53:06 +0200 |
| commit | cddd4591404fb4c53dc0b3c0b15b942cdbed4356 (patch) | |
| tree | 392c1179de46b0f804e3789edca19069b64e6b44 /target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch | |
| parent | d1d2c0b5579ea4f69a42246c9318539d61ba1999 (diff) | |
| download | upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.gz upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.bz2 upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.zip | |
layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/
For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.
The patches are sorted into the following categories:
301-arch-xxxx
302-dts-xxxx
303-core-xxxx
701-net-xxxx
801-audio-xxxx
802-can-xxxx
803-clock-xxxx
804-crypto-xxxx
805-display-xxxx
806-dma-xxxx
807-gpio-xxxx
808-i2c-xxxx
809-jailhouse-xxxx
810-keys-xxxx
811-kvm-xxxx
812-pcie-xxxx
813-pm-xxxx
814-qe-xxxx
815-sata-xxxx
816-sdhc-xxxx
817-spi-xxxx
818-thermal-xxxx
819-uart-xxxx
820-usb-xxxx
821-vfio-xxxx
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch b/target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch new file mode 100644 index 0000000000..e82b83aef1 --- /dev/null +++ b/target/linux/layerscape/patches-5.4/812-pcie-0002-PCI-dwc-Use-interrupt-disabling-instead-of-masking.patch @@ -0,0 +1,60 @@ +From c89d85a39df353290ea7af84a32d5ca692a3c27a Mon Sep 17 00:00:00 2001 +From: Fugang Duan <fugang.duan@nxp.com> +Date: Sat, 2 Nov 2019 15:51:40 +0800 +Subject: [PATCH] PCI: dwc: Use interrupt disabling instead of masking + +commit 830920e065e9("PCI: dwc: Use interrupt masking instead +of disabling") break i.MX platform PCIe suspend/resume when +MSI enabled. + +Revert the commit to keep orinigal method that using interrupt +disabling instead of masking. + +Signed-off-by: Fugang Duan <fugang.duan@nxp.com> +--- + drivers/pci/controller/dwc/pcie-designware-host.c | 19 +++++++------------ + 1 file changed, 7 insertions(+), 12 deletions(-) + +--- a/drivers/pci/controller/dwc/pcie-designware-host.c ++++ b/drivers/pci/controller/dwc/pcie-designware-host.c +@@ -157,8 +157,8 @@ static void dw_pci_bottom_mask(struct ir + bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; + + pp->irq_mask[ctrl] |= BIT(bit); +- dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4, +- pp->irq_mask[ctrl]); ++ dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, ++ ~pp->irq_mask[ctrl]); + + raw_spin_unlock_irqrestore(&pp->lock, flags); + } +@@ -176,8 +176,8 @@ static void dw_pci_bottom_unmask(struct + bit = d->hwirq % MAX_MSI_IRQS_PER_CTRL; + + pp->irq_mask[ctrl] &= ~BIT(bit); +- dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + res, 4, +- pp->irq_mask[ctrl]); ++ dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + res, 4, ++ ~pp->irq_mask[ctrl]); + + raw_spin_unlock_irqrestore(&pp->lock, flags); + } +@@ -657,15 +657,10 @@ void dw_pcie_setup_rc(struct pcie_port * + num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL; + + /* Initialize IRQ Status array */ +- for (ctrl = 0; ctrl < num_ctrls; ctrl++) { +- pp->irq_mask[ctrl] = ~0; +- dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_MASK + ++ for (ctrl = 0; ctrl < num_ctrls; ctrl++) ++ dw_pcie_rd_own_conf(pp, PCIE_MSI_INTR0_ENABLE + + (ctrl * MSI_REG_CTRL_BLOCK_SIZE), +- 4, pp->irq_mask[ctrl]); +- dw_pcie_wr_own_conf(pp, PCIE_MSI_INTR0_ENABLE + +- (ctrl * MSI_REG_CTRL_BLOCK_SIZE), +- 4, ~0); +- } ++ 4, &pp->irq_mask[ctrl]); + } + + /* Setup RC BARs */ |