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author | Yangbo Lu <yangbo.lu@nxp.com> | 2020-04-10 10:47:05 +0800 |
---|---|---|
committer | Petr Štetiar <ynezz@true.cz> | 2020-05-07 12:53:06 +0200 |
commit | cddd4591404fb4c53dc0b3c0b15b942cdbed4356 (patch) | |
tree | 392c1179de46b0f804e3789edca19069b64e6b44 /target/linux/layerscape/patches-5.4/811-kvm-0002-arm-arm64-KVM-allow-specifying-s2-prot-bits-when-map.patch | |
parent | d1d2c0b5579ea4f69a42246c9318539d61ba1999 (diff) | |
download | upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.gz upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.bz2 upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.zip |
layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/
For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.
The patches are sorted into the following categories:
301-arch-xxxx
302-dts-xxxx
303-core-xxxx
701-net-xxxx
801-audio-xxxx
802-can-xxxx
803-clock-xxxx
804-crypto-xxxx
805-display-xxxx
806-dma-xxxx
807-gpio-xxxx
808-i2c-xxxx
809-jailhouse-xxxx
810-keys-xxxx
811-kvm-xxxx
812-pcie-xxxx
813-pm-xxxx
814-qe-xxxx
815-sata-xxxx
816-sdhc-xxxx
817-spi-xxxx
818-thermal-xxxx
819-uart-xxxx
820-usb-xxxx
821-vfio-xxxx
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/811-kvm-0002-arm-arm64-KVM-allow-specifying-s2-prot-bits-when-map.patch')
-rw-r--r-- | target/linux/layerscape/patches-5.4/811-kvm-0002-arm-arm64-KVM-allow-specifying-s2-prot-bits-when-map.patch | 87 |
1 files changed, 87 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/811-kvm-0002-arm-arm64-KVM-allow-specifying-s2-prot-bits-when-map.patch b/target/linux/layerscape/patches-5.4/811-kvm-0002-arm-arm64-KVM-allow-specifying-s2-prot-bits-when-map.patch new file mode 100644 index 0000000000..d4fcf5c4b8 --- /dev/null +++ b/target/linux/layerscape/patches-5.4/811-kvm-0002-arm-arm64-KVM-allow-specifying-s2-prot-bits-when-map.patch @@ -0,0 +1,87 @@ +From 7a291e75b7793f1fbd0ad9ad39ae35a2b091d84b Mon Sep 17 00:00:00 2001 +From: Laurentiu Tudor <laurentiu.tudor@nxp.com> +Date: Tue, 26 Jul 2016 16:12:30 +0300 +Subject: [PATCH] arm/arm64 KVM: allow specifying s2 prot bits when mapping i/o + +Add parameter allowing to specify s2 page table +protection and type bits and update the callers +accordingly. +The parameter will be used in a forthcoming patch. + +Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> +--- + arch/arm/include/asm/kvm_mmu.h | 3 ++- + arch/arm64/include/asm/kvm_mmu.h | 3 ++- + virt/kvm/arm/mmu.c | 8 +++++--- + virt/kvm/arm/vgic/vgic-v2.c | 3 ++- + 4 files changed, 11 insertions(+), 6 deletions(-) + +--- a/arch/arm/include/asm/kvm_mmu.h ++++ b/arch/arm/include/asm/kvm_mmu.h +@@ -55,7 +55,8 @@ void stage2_unmap_vm(struct kvm *kvm); + int kvm_alloc_stage2_pgd(struct kvm *kvm); + void kvm_free_stage2_pgd(struct kvm *kvm); + int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa, +- phys_addr_t pa, unsigned long size, bool writable); ++ phys_addr_t pa, unsigned long size, bool writable, ++ pgprot_t prot); + + int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run); + +--- a/arch/arm64/include/asm/kvm_mmu.h ++++ b/arch/arm64/include/asm/kvm_mmu.h +@@ -156,7 +156,8 @@ void stage2_unmap_vm(struct kvm *kvm); + int kvm_alloc_stage2_pgd(struct kvm *kvm); + void kvm_free_stage2_pgd(struct kvm *kvm); + int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa, +- phys_addr_t pa, unsigned long size, bool writable); ++ phys_addr_t pa, unsigned long size, bool writable, ++ pgprot_t prot); + + int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run); + +--- a/virt/kvm/arm/mmu.c ++++ b/virt/kvm/arm/mmu.c +@@ -1335,9 +1335,11 @@ static int stage2_pudp_test_and_clear_yo + * @guest_ipa: The IPA at which to insert the mapping + * @pa: The physical address of the device + * @size: The size of the mapping ++ * @prot: S2 page translation bits + */ + int kvm_phys_addr_ioremap(struct kvm *kvm, phys_addr_t guest_ipa, +- phys_addr_t pa, unsigned long size, bool writable) ++ phys_addr_t pa, unsigned long size, bool writable, ++ pgprot_t prot) + { + phys_addr_t addr, end; + int ret = 0; +@@ -1348,7 +1350,7 @@ int kvm_phys_addr_ioremap(struct kvm *kv + pfn = __phys_to_pfn(pa); + + for (addr = guest_ipa; addr < end; addr += PAGE_SIZE) { +- pte_t pte = kvm_pfn_pte(pfn, PAGE_S2_DEVICE); ++ pte_t pte = kvm_pfn_pte(pfn, prot); + + if (writable) + pte = kvm_s2pte_mkwrite(pte); +@@ -2346,7 +2348,7 @@ int kvm_arch_prepare_memory_region(struc + + ret = kvm_phys_addr_ioremap(kvm, gpa, pa, + vm_end - vm_start, +- writable); ++ writable, PAGE_S2_DEVICE); + if (ret) + break; + } +--- a/virt/kvm/arm/vgic/vgic-v2.c ++++ b/virt/kvm/arm/vgic/vgic-v2.c +@@ -341,7 +341,8 @@ int vgic_v2_map_resources(struct kvm *kv + if (!static_branch_unlikely(&vgic_v2_cpuif_trap)) { + ret = kvm_phys_addr_ioremap(kvm, dist->vgic_cpu_base, + kvm_vgic_global_state.vcpu_base, +- KVM_VGIC_V2_CPU_SIZE, true); ++ KVM_VGIC_V2_CPU_SIZE, true, ++ PAGE_S2_DEVICE); + if (ret) { + kvm_err("Unable to remap VGIC CPU to VCPU\n"); + goto out; |