layerscape: add patches-5.4

Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/

For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.

The patches are sorted into the following categories:
  301-arch-xxxx
  302-dts-xxxx
  303-core-xxxx
  701-net-xxxx
  801-audio-xxxx
  802-can-xxxx
  803-clock-xxxx
  804-crypto-xxxx
  805-display-xxxx
  806-dma-xxxx
  807-gpio-xxxx
  808-i2c-xxxx
  809-jailhouse-xxxx
  810-keys-xxxx
  811-kvm-xxxx
  812-pcie-xxxx
  813-pm-xxxx
  814-qe-xxxx
  815-sata-xxxx
  816-sdhc-xxxx
  817-spi-xxxx
  818-thermal-xxxx
  819-uart-xxxx
  820-usb-xxxx
  821-vfio-xxxx

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

1 files changed, 44 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-5.4/804-crypto-0038-LF-838-crypto-caam-increase-the-domain-of-write-memo.patch b/target/linux/layerscape/patches-5.4/804-crypto-0038-LF-838-crypto-caam-increase-the-domain-of-write-memo.patch
new file mode 100644
index 0000000000..7cc8c5f244
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/804-crypto-0038-LF-838-crypto-caam-increase-the-domain-of-write-memo.patch
@@ -0,0 +1,44 @@
+From ada13fea4dcc8419e0523614b108635d8f689000 Mon Sep 17 00:00:00 2001
+From: Iuliana Prodan <iuliana.prodan@nxp.com>
+Date: Mon, 17 Feb 2020 03:05:10 +0200
+Subject: [PATCH] LF-838: crypto: caam - increase the domain of write memory
+ barrier to full system
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+In caam_jr_enqueue, under heavy DDR load, smp_wmb() or dma_wmb()
+fail to make the input ring be updated before the CAAM starts
+reading it. So, CAAM will process, again, an old descriptor address
+and will put it in the output ring. This will make caam_jr_dequeue()
+to fail, since this old descriptor is not in the software ring.
+To fix this, use wmb() which works on the full system instead of
+inner/outer shareable domains.
+
+Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
+Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
+Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
+---
+ drivers/crypto/caam/jr.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+--- a/drivers/crypto/caam/jr.c
++++ b/drivers/crypto/caam/jr.c
+@@ -434,8 +434,16 @@ int caam_jr_enqueue(struct device *dev,
+ 	 * Guarantee that the descriptor's DMA address has been written to
+ 	 * the next slot in the ring before the write index is updated, since
+ 	 * other cores may update this index independently.
++	 *
++	 * Under heavy DDR load, smp_wmb() or dma_wmb() fail to make the input
++	 * ring be updated before the CAAM starts reading it. So, CAAM will
++	 * process, again, an old descriptor address and will put it in the
++	 * output ring. This will make caam_jr_dequeue() to fail, since this
++	 * old descriptor is not in the software ring.
++	 * To fix this, use wmb() which works on the full system instead of
++	 * inner/outer shareable domains.
+ 	 */
+-	smp_wmb();
++	wmb();
+ 
+ 	jrp->head = (head + 1) & (JOBR_DEPTH - 1);
+