aboutsummaryrefslogtreecommitdiffstats
path: root/target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch
diff options
context:
space:
mode:
authorDaniel Golle <daniel@makrotopia.org>2022-03-21 01:16:48 +0000
committerDaniel Golle <daniel@makrotopia.org>2022-03-21 13:11:56 +0000
commit786bf7fdaca4c75e7eba6e9aa3a8b5775fd21186 (patch)
tree926fecb2b1f6ce1e42ba7ef4c7aab8e68dfd214c /target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch
parent9470160c350d15f765c33d6c1db15d6c4709a64c (diff)
downloadupstream-786bf7fdaca4c75e7eba6e9aa3a8b5775fd21186.tar.gz
upstream-786bf7fdaca4c75e7eba6e9aa3a8b5775fd21186.tar.bz2
upstream-786bf7fdaca4c75e7eba6e9aa3a8b5775fd21186.zip
kernel: delete Linux 5.4 config and patches
As the upcoming release will be based on Linux 5.10 only, remove all kernel configuration as well as patches for Linux 5.4. There were no targets still actively using Linux 5.4. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 3a14580411adfb75f9a44eded9f41245b9e44606)
Diffstat (limited to 'target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch')
-rw-r--r--target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch70
1 files changed, 0 insertions, 70 deletions
diff --git a/target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch b/target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch
deleted file mode 100644
index 26dbb02c79..0000000000
--- a/target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-From 7b294e0cd2f7fbfb548a17b8d68d161da19e6592 Mon Sep 17 00:00:00 2001
-From: Joakim Zhang <qiangqing.zhang@nxp.com>
-Date: Fri, 12 Jul 2019 08:02:56 +0000
-Subject: [PATCH] can: flexcan: add Transceiver Delay Compensation suopport
-
-The CAN FD protocol allows the transmission and reception of data at a higher
-bit rate than the nominal rate used in the arbitration phase when the message's
-BRS bit is set.
-
-The TDC mechanism is effective only during the data phase of FD frames
-having BRS bit set. It has no effect either on non-FD frames, or on FD
-frames transmitted at normal bit rate.
-
-Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
-Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
----
- drivers/net/can/flexcan.c | 19 ++++++++++++++++++-
- 1 file changed, 18 insertions(+), 1 deletion(-)
-
---- a/drivers/net/can/flexcan.c
-+++ b/drivers/net/can/flexcan.c
-@@ -149,8 +149,11 @@
-
- /* FLEXCAN FD control register (FDCTRL) bits */
- #define FLEXCAN_FDCTRL_FDRATE BIT(31)
-+#define FLEXCAN_FDCTRL_TDCEN BIT(15)
-+#define FLEXCAN_FDCTRL_TDCFAIL BIT(14)
- #define FLEXCAN_FDCTRL_MBDSR1(x) (((x) & 0x3) << 19)
- #define FLEXCAN_FDCTRL_MBDSR0(x) (((x) & 0x3) << 16)
-+#define FLEXCAN_FDCTRL_TDCOFF(x) (((x) & 0x1f) << 8)
-
- /* FLEXCAN FD Bit Timing register (FDCBT) bits */
- #define FLEXCAN_FDCBT_FPRESDIV(x) (((x) & 0x3ff) << 20)
-@@ -1108,7 +1111,7 @@ static void flexcan_set_bittiming(struct
- struct can_bittiming *bt = &priv->can.bittiming;
- struct can_bittiming *dbt = &priv->can.data_bittiming;
- struct flexcan_regs __iomem *regs = priv->regs;
-- u32 reg, reg_cbt, reg_fdcbt;
-+ u32 reg, reg_cbt, reg_fdcbt, reg_fdctrl;
-
- reg = priv->read(&regs->ctrl);
- reg &= ~(FLEXCAN_CTRL_LPB | FLEXCAN_CTRL_SMP | FLEXCAN_CTRL_LOM);
-@@ -1180,6 +1183,19 @@ static void flexcan_set_bittiming(struct
- FLEXCAN_FDCBT_FPROPSEG(dbt->prop_seg);
- priv->write(reg_fdcbt, &regs->fdcbt);
-
-+ /* enable transceiver delay compensation(TDC) for fd frame.
-+ * TDC must be disabled when Loop Back mode is enabled.
-+ */
-+ reg_fdctrl = priv->read(&regs->fdctrl);
-+ if (!(reg & FLEXCAN_CTRL_LPB)) {
-+ reg_fdctrl |= FLEXCAN_FDCTRL_TDCEN;
-+ reg_fdctrl &= ~FLEXCAN_FDCTRL_TDCOFF(0x1f);
-+ /* for the TDC to work reliably, the offset has to use optimal settings */
-+ reg_fdctrl |= FLEXCAN_FDCTRL_TDCOFF(((dbt->phase_seg1 - 1) + dbt->prop_seg + 2) *
-+ ((dbt->brp -1) + 1));
-+ }
-+ priv->write(reg_fdctrl, &regs->fdctrl);
-+
- if (bt->brp != dbt->brp)
- netdev_warn(dev, "Warning!! data brp = %d and brp = %d don't match.\n"
- "flexcan may not work. consider using different bitrate or data bitrate\n",
-@@ -1331,6 +1347,7 @@ static int flexcan_chip_start(struct net
- /* FDCTRL */
- if (priv->can.ctrlmode_supported & CAN_CTRLMODE_FD) {
- reg_fdctrl = priv->read(&regs->fdctrl) & ~FLEXCAN_FDCTRL_FDRATE;
-+ reg_fdctrl &= ~FLEXCAN_FDCTRL_TDCEN;
- reg_fdctrl &= ~(FLEXCAN_FDCTRL_MBDSR1(0x3) | FLEXCAN_FDCTRL_MBDSR0(0x3));
- reg_mcr = priv->read(&regs->mcr) & ~FLEXCAN_MCR_FDEN;
- reg_ctrl2 = priv->read(&regs->ctrl2) & ~FLEXCAN_CTRL2_ISOCANFDEN;