diff options
| author | John Audia <graysky@archlinux.us> | 2020-11-24 11:34:10 -0500 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2020-11-26 11:17:55 +0100 |
| commit | 4e39949dd1f7eb706d857e1c44a992ae752132a7 (patch) | |
| tree | be33a7528f700766af7dda05afdaaf1f018fd127 /target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch | |
| parent | f29231ece747dc09c350aea90bd30d1ab6447a4a (diff) | |
| download | upstream-4e39949dd1f7eb706d857e1c44a992ae752132a7.tar.gz upstream-4e39949dd1f7eb706d857e1c44a992ae752132a7.tar.bz2 upstream-4e39949dd1f7eb706d857e1c44a992ae752132a7.zip | |
kernel: bump 5.4 to 5.4.80
Removed since could be reverse-applied by quilt and found to be
included upstream:
backport-5.4/789-net-usb-qmi_wwan-Set-DTR-quirk-for-MR400.patch
All modifications made by update_kernel.sh
Build system: x86_64
Build-tested: ipq806x/R7800, bcm27xx/bcm2711, ath79/generic
Run-tested: ipq806x/R7800
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
Tested-by: Curtis Deptuck <curtdept@me.com> [x86_64 build/run]
Diffstat (limited to 'target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch b/target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch index dcdc1647aa..0b3a1bc9b6 100644 --- a/target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch +++ b/target/linux/layerscape/patches-5.4/802-can-0022-can-flexcan-add-Transceiver-Delay-Compensation-suopp.patch @@ -31,7 +31,7 @@ Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> /* FLEXCAN FD Bit Timing register (FDCBT) bits */ #define FLEXCAN_FDCBT_FPRESDIV(x) (((x) & 0x3ff) << 20) -@@ -1100,7 +1103,7 @@ static void flexcan_set_bittiming(struct +@@ -1102,7 +1105,7 @@ static void flexcan_set_bittiming(struct struct can_bittiming *bt = &priv->can.bittiming; struct can_bittiming *dbt = &priv->can.data_bittiming; struct flexcan_regs __iomem *regs = priv->regs; @@ -40,7 +40,7 @@ Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> reg = priv->read(®s->ctrl); reg &= ~(FLEXCAN_CTRL_LPB | FLEXCAN_CTRL_SMP | FLEXCAN_CTRL_LOM); -@@ -1172,6 +1175,19 @@ static void flexcan_set_bittiming(struct +@@ -1174,6 +1177,19 @@ static void flexcan_set_bittiming(struct FLEXCAN_FDCBT_FPROPSEG(dbt->prop_seg); priv->write(reg_fdcbt, ®s->fdcbt); @@ -60,7 +60,7 @@ Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> if (bt->brp != dbt->brp) netdev_warn(dev, "Warning!! data brp = %d and brp = %d don't match.\n" "flexcan may not work. consider using different bitrate or data bitrate\n", -@@ -1321,6 +1337,7 @@ static int flexcan_chip_start(struct net +@@ -1323,6 +1339,7 @@ static int flexcan_chip_start(struct net /* FDCTRL */ if (priv->can.ctrlmode_supported & CAN_CTRLMODE_FD) { reg_fdctrl = priv->read(®s->fdctrl) & ~FLEXCAN_FDCTRL_FDRATE; |