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authorDaniel Golle <daniel@makrotopia.org>2022-03-21 01:16:48 +0000
committerDaniel Golle <daniel@makrotopia.org>2022-03-21 13:11:56 +0000
commit786bf7fdaca4c75e7eba6e9aa3a8b5775fd21186 (patch)
tree926fecb2b1f6ce1e42ba7ef4c7aab8e68dfd214c /target/linux/layerscape/patches-5.4/801-audio-0046-Sound-Soc-fsl-Set-SAI-Channel-Mode-to-Output-Mode.patch
parent9470160c350d15f765c33d6c1db15d6c4709a64c (diff)
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kernel: delete Linux 5.4 config and patches
As the upcoming release will be based on Linux 5.10 only, remove all kernel configuration as well as patches for Linux 5.4. There were no targets still actively using Linux 5.4. Signed-off-by: Daniel Golle <daniel@makrotopia.org> (cherry picked from commit 3a14580411adfb75f9a44eded9f41245b9e44606)
Diffstat (limited to 'target/linux/layerscape/patches-5.4/801-audio-0046-Sound-Soc-fsl-Set-SAI-Channel-Mode-to-Output-Mode.patch')
-rw-r--r--target/linux/layerscape/patches-5.4/801-audio-0046-Sound-Soc-fsl-Set-SAI-Channel-Mode-to-Output-Mode.patch72
1 files changed, 0 insertions, 72 deletions
diff --git a/target/linux/layerscape/patches-5.4/801-audio-0046-Sound-Soc-fsl-Set-SAI-Channel-Mode-to-Output-Mode.patch b/target/linux/layerscape/patches-5.4/801-audio-0046-Sound-Soc-fsl-Set-SAI-Channel-Mode-to-Output-Mode.patch
deleted file mode 100644
index 0d8fc165e9..0000000000
--- a/target/linux/layerscape/patches-5.4/801-audio-0046-Sound-Soc-fsl-Set-SAI-Channel-Mode-to-Output-Mode.patch
+++ /dev/null
@@ -1,72 +0,0 @@
-From 494c1f9c5c86396d2974c6072f728e2325b72703 Mon Sep 17 00:00:00 2001
-From: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
-Date: Wed, 7 Mar 2018 11:35:07 +0200
-Subject: [PATCH] Sound: Soc: fsl: Set SAI Channel Mode to Output Mode
-
-Transmit data pins will output zero when slots are masked or channels
-are disabled. In CHMOD TDM mode, transmit data pins are tri-stated when
-slots are masked or channels are disabled. When data pins are tri-stated,
-there is noise on some channels when FS clock value is high and data is
-read while fsclk is transitioning from high to low.
-
-Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
-Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
----
- sound/soc/fsl/fsl_sai.c | 14 +++++++++++---
- sound/soc/fsl/fsl_sai.h | 2 ++
- 2 files changed, 13 insertions(+), 3 deletions(-)
-
---- a/sound/soc/fsl/fsl_sai.c
-+++ b/sound/soc/fsl/fsl_sai.c
-@@ -589,6 +589,11 @@ static int fsl_sai_hw_params(struct snd_
-
- val_cr4 |= FSL_SAI_CR4_FRSZ(slots);
-
-+ /* Output Mode - data pins transmit 0 when slots are masked
-+ * or channels are disabled
-+ */
-+ val_cr4 |= FSL_SAI_CR4_CHMOD;
-+
- /*
- * For SAI master mode, when Tx(Rx) sync with Rx(Tx) clock, Rx(Tx) will
- * generate bclk and frame clock for Tx(Rx), we should set RCR4(TCR4),
-@@ -599,14 +604,16 @@ static int fsl_sai_hw_params(struct snd_
- if (!sai->slave_mode[tx]) {
- if (!sai->synchronous[TX] && sai->synchronous[RX] && !tx) {
- regmap_update_bits(sai->regmap, FSL_SAI_TCR4(offset),
-- FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
-+ FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK |
-+ FSL_SAI_CR4_CHMOD_MASK,
- val_cr4);
- regmap_update_bits(sai->regmap, FSL_SAI_TCR5(offset),
- FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
- FSL_SAI_CR5_FBT_MASK, val_cr5);
- } else if (!sai->synchronous[RX] && sai->synchronous[TX] && tx) {
- regmap_update_bits(sai->regmap, FSL_SAI_RCR4(offset),
-- FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
-+ FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK |
-+ FSL_SAI_CR4_CHMOD_MASK,
- val_cr4);
- regmap_update_bits(sai->regmap, FSL_SAI_RCR5(offset),
- FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
-@@ -682,7 +689,8 @@ static int fsl_sai_hw_params(struct snd_
- }
-
- regmap_update_bits(sai->regmap, FSL_SAI_xCR4(tx, offset),
-- FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK,
-+ FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK |
-+ FSL_SAI_CR4_CHMOD_MASK,
- val_cr4);
- regmap_update_bits(sai->regmap, FSL_SAI_xCR5(tx, offset),
- FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK |
---- a/sound/soc/fsl/fsl_sai.h
-+++ b/sound/soc/fsl/fsl_sai.h
-@@ -129,6 +129,8 @@
- #define FSL_SAI_CR4_FRSZ_MASK (0x1f << 16)
- #define FSL_SAI_CR4_SYWD(x) (((x) - 1) << 8)
- #define FSL_SAI_CR4_SYWD_MASK (0x1f << 8)
-+#define FSL_SAI_CR4_CHMOD (1 << 5)
-+#define FSL_SAI_CR4_CHMOD_MASK (1 << 5)
- #define FSL_SAI_CR4_MF BIT(4)
- #define FSL_SAI_CR4_FSE BIT(3)
- #define FSL_SAI_CR4_FSP BIT(1)