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author | Yangbo Lu <yangbo.lu@nxp.com> | 2020-04-10 10:47:05 +0800 |
---|---|---|
committer | Petr Štetiar <ynezz@true.cz> | 2020-05-07 12:53:06 +0200 |
commit | cddd4591404fb4c53dc0b3c0b15b942cdbed4356 (patch) | |
tree | 392c1179de46b0f804e3789edca19069b64e6b44 /target/linux/layerscape/patches-5.4/701-net-0282-net-mscc-ocelot-introduce-more-focused-PCS-ops-for-P.patch | |
parent | d1d2c0b5579ea4f69a42246c9318539d61ba1999 (diff) | |
download | upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.gz upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.bz2 upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.zip |
layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/
For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.
The patches are sorted into the following categories:
301-arch-xxxx
302-dts-xxxx
303-core-xxxx
701-net-xxxx
801-audio-xxxx
802-can-xxxx
803-clock-xxxx
804-crypto-xxxx
805-display-xxxx
806-dma-xxxx
807-gpio-xxxx
808-i2c-xxxx
809-jailhouse-xxxx
810-keys-xxxx
811-kvm-xxxx
812-pcie-xxxx
813-pm-xxxx
814-qe-xxxx
815-sata-xxxx
816-sdhc-xxxx
817-spi-xxxx
818-thermal-xxxx
819-uart-xxxx
820-usb-xxxx
821-vfio-xxxx
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/701-net-0282-net-mscc-ocelot-introduce-more-focused-PCS-ops-for-P.patch')
-rw-r--r-- | target/linux/layerscape/patches-5.4/701-net-0282-net-mscc-ocelot-introduce-more-focused-PCS-ops-for-P.patch | 169 |
1 files changed, 169 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/701-net-0282-net-mscc-ocelot-introduce-more-focused-PCS-ops-for-P.patch b/target/linux/layerscape/patches-5.4/701-net-0282-net-mscc-ocelot-introduce-more-focused-PCS-ops-for-P.patch new file mode 100644 index 0000000000..d7ae1196dd --- /dev/null +++ b/target/linux/layerscape/patches-5.4/701-net-0282-net-mscc-ocelot-introduce-more-focused-PCS-ops-for-P.patch @@ -0,0 +1,169 @@ +From 07f63e91f5e81f7f36c1e646f72c394c7f60c05c Mon Sep 17 00:00:00 2001 +From: Vladimir Oltean <vladimir.oltean@nxp.com> +Date: Fri, 22 Nov 2019 13:46:34 +0200 +Subject: [PATCH] net: mscc: ocelot: introduce more focused PCS ops for PHYLINK + +The reason for doing this is that the 2 mainline Ocelot switches so far, +VSC7514 and VSC9959, have radically different SoC/SerDes integration. So +although the PHYLINK callbacks are common, the implementations will +actually lie in device-specific function pointers. + +Also, there was a duplicated and unused function pointer for pcs_init in +struct ocelot, remove that. + +Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> +--- + drivers/net/ethernet/mscc/ocelot.c | 36 ++++++++------------------------ + drivers/net/ethernet/mscc/ocelot_board.c | 35 ++++++++++++++++++++++++++++++- + include/soc/mscc/ocelot.h | 12 ++++++++--- + 3 files changed, 52 insertions(+), 31 deletions(-) + +--- a/drivers/net/ethernet/mscc/ocelot.c ++++ b/drivers/net/ethernet/mscc/ocelot.c +@@ -410,43 +410,25 @@ void ocelot_phylink_validate(struct ocel + unsigned long *supported, + struct phylink_link_state *state) + { +- __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; +- +- if (state->interface != PHY_INTERFACE_MODE_NA && +- state->interface != PHY_INTERFACE_MODE_GMII && +- state->interface != PHY_INTERFACE_MODE_SGMII && +- state->interface != PHY_INTERFACE_MODE_QSGMII) { +- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); +- return; +- } +- +- /* No half-duplex. */ +- phylink_set_port_modes(mask); +- phylink_set(mask, Autoneg); +- phylink_set(mask, Pause); +- phylink_set(mask, Asym_Pause); +- phylink_set(mask, 10baseT_Full); +- phylink_set(mask, 100baseT_Full); +- phylink_set(mask, 1000baseT_Full); +- phylink_set(mask, 2500baseT_Full); +- +- bitmap_and(supported, supported, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); +- bitmap_and(state->advertising, state->advertising, mask, +- __ETHTOOL_LINK_MODE_MASK_NBITS); ++ if (ocelot->ops->pcs_validate) ++ ocelot->ops->pcs_validate(ocelot, port, supported, state); + } + EXPORT_SYMBOL(ocelot_phylink_validate); + + void ocelot_phylink_mac_pcs_get_state(struct ocelot *ocelot, int port, + struct phylink_link_state *state) + { +- state->link = 1; ++ if (ocelot->ops->pcs_link_state) ++ ocelot->ops->pcs_link_state(ocelot, port, state); ++ else ++ state->link = 1; + } + EXPORT_SYMBOL(ocelot_phylink_mac_pcs_get_state); + + void ocelot_phylink_mac_an_restart(struct ocelot *ocelot, int port) + { +- /* Not supported */ ++ if (ocelot->ops->pcs_an_restart) ++ ocelot->ops->pcs_an_restart(ocelot, port); + } + EXPORT_SYMBOL(ocelot_phylink_mac_an_restart); + +@@ -490,7 +472,7 @@ void ocelot_phylink_mac_config(struct oc + ocelot_port_writel(ocelot_port, mac_mode, DEV_MAC_MODE_CFG); + + if (ocelot->ops->pcs_init) +- ocelot->ops->pcs_init(ocelot, port); ++ ocelot->ops->pcs_init(ocelot, port, link_an_mode, state); + + /* Enable MAC module */ + ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA | +--- a/drivers/net/ethernet/mscc/ocelot_board.c ++++ b/drivers/net/ethernet/mscc/ocelot_board.c +@@ -212,7 +212,9 @@ static const struct of_device_id mscc_oc + }; + MODULE_DEVICE_TABLE(of, mscc_ocelot_match); + +-static void ocelot_port_pcs_init(struct ocelot *ocelot, int port) ++static void ocelot_port_pcs_init(struct ocelot *ocelot, int port, ++ unsigned int link_an_mode, ++ const struct phylink_link_state *state) + { + struct ocelot_port *ocelot_port = ocelot->ports[port]; + +@@ -235,6 +237,36 @@ static void ocelot_port_pcs_init(struct + ocelot_port_writel(ocelot_port, 0, PCS1G_LB_CFG); + } + ++void ocelot_port_pcs_validate(struct ocelot *ocelot, int port, ++ unsigned long *supported, ++ struct phylink_link_state *state) ++{ ++ __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; ++ ++ if (state->interface != PHY_INTERFACE_MODE_NA && ++ state->interface != PHY_INTERFACE_MODE_GMII && ++ state->interface != PHY_INTERFACE_MODE_SGMII && ++ state->interface != PHY_INTERFACE_MODE_QSGMII) { ++ bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS); ++ return; ++ } ++ ++ /* No half-duplex. */ ++ phylink_set_port_modes(mask); ++ phylink_set(mask, Autoneg); ++ phylink_set(mask, Pause); ++ phylink_set(mask, Asym_Pause); ++ phylink_set(mask, 10baseT_Full); ++ phylink_set(mask, 100baseT_Full); ++ phylink_set(mask, 1000baseT_Full); ++ phylink_set(mask, 2500baseT_Full); ++ ++ bitmap_and(supported, supported, mask, ++ __ETHTOOL_LINK_MODE_MASK_NBITS); ++ bitmap_and(state->advertising, state->advertising, mask, ++ __ETHTOOL_LINK_MODE_MASK_NBITS); ++} ++ + static int ocelot_reset(struct ocelot *ocelot) + { + int retries = 100; +@@ -260,6 +292,7 @@ static int ocelot_reset(struct ocelot *o + + static const struct ocelot_ops ocelot_ops = { + .pcs_init = ocelot_port_pcs_init, ++ .pcs_validate = ocelot_port_pcs_validate, + .reset = ocelot_reset, + }; + +--- a/include/soc/mscc/ocelot.h ++++ b/include/soc/mscc/ocelot.h +@@ -412,7 +412,15 @@ enum { + struct ocelot; + + struct ocelot_ops { +- void (*pcs_init)(struct ocelot *ocelot, int port); ++ void (*pcs_init)(struct ocelot *ocelot, int port, ++ unsigned int link_an_mode, ++ const struct phylink_link_state *state); ++ void (*pcs_an_restart)(struct ocelot *ocelot, int port); ++ void (*pcs_link_state)(struct ocelot *ocelot, int port, ++ struct phylink_link_state *state); ++ void (*pcs_validate)(struct ocelot *ocelot, int port, ++ unsigned long *supported, ++ struct phylink_link_state *state); + int (*reset)(struct ocelot *ocelot); + }; + +@@ -479,8 +487,6 @@ struct ocelot { + struct mutex ptp_lock; + /* Protects the PTP clock */ + spinlock_t ptp_clock_lock; +- +- void (*port_pcs_init)(struct ocelot_port *port); + }; + + #define ocelot_read_ix(ocelot, reg, gi, ri) __ocelot_read_ix(ocelot, reg, reg##_GSZ * (gi) + reg##_RSZ * (ri)) |