layerscape: add patches-5.4

Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/

For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.

The patches are sorted into the following categories:
  301-arch-xxxx
  302-dts-xxxx
  303-core-xxxx
  701-net-xxxx
  801-audio-xxxx
  802-can-xxxx
  803-clock-xxxx
  804-crypto-xxxx
  805-display-xxxx
  806-dma-xxxx
  807-gpio-xxxx
  808-i2c-xxxx
  809-jailhouse-xxxx
  810-keys-xxxx
  811-kvm-xxxx
  812-pcie-xxxx
  813-pm-xxxx
  814-qe-xxxx
  815-sata-xxxx
  816-sdhc-xxxx
  817-spi-xxxx
  818-thermal-xxxx
  819-uart-xxxx
  820-usb-xxxx
  821-vfio-xxxx

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>

1 files changed, 63 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-5.4/701-net-0252-net-mscc-ocelot-don-t-hardcode-the-number-of-the-CPU.patch b/target/linux/layerscape/patches-5.4/701-net-0252-net-mscc-ocelot-don-t-hardcode-the-number-of-the-CPU.patch
new file mode 100644
index 0000000000..aec70e6d6f
--- /dev/null
+++ b/target/linux/layerscape/patches-5.4/701-net-0252-net-mscc-ocelot-don-t-hardcode-the-number-of-the-CPU.patch
@@ -0,0 +1,63 @@
+From d176f477fd2acded12356088c0f67dee059facb5 Mon Sep 17 00:00:00 2001
+From: Vladimir Oltean <vladimir.oltean@nxp.com>
+Date: Sat, 9 Nov 2019 15:03:01 +0200
+Subject: [PATCH] net: mscc: ocelot: don't hardcode the number of the CPU port
+
+VSC7514 is a 10-port switch with 2 extra "CPU ports" (targets in the
+queuing subsystem for terminating traffic locally).
+
+There are 2 issues with hardcoding the CPU port as #10:
+- It is not clear which snippets of the code are configuring something
+  for one of the CPU ports, and which snippets are just doing something
+  related to the number of physical ports.
+- Actually any physical port can act as a CPU port connected to an
+  external CPU (in addition to the local CPU). This is called NPI mode
+  (Node Processor Interface) and is the way that the 6-port VSC9959
+  (Felix) switch is integrated inside NXP LS1028A (the "local management
+  CPU" functionality is not used there).
+
+This patch makes it clear that the ocelot_bridge_stp_state_set function
+operates on the CPU port (by making it an implicit member of the
+bridging domain), and at the same time adds logic for the NPI port (aka
+a physical port) to play the role of a CPU port (it shouldn't be part of
+bridge_fwd_mask, as it's not explicitly enslaved to a bridge).
+
+Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/ethernet/mscc/ocelot.c | 11 +++++++----
+ 1 file changed, 7 insertions(+), 4 deletions(-)
+
+--- a/drivers/net/ethernet/mscc/ocelot.c
++++ b/drivers/net/ethernet/mscc/ocelot.c
+@@ -1383,7 +1383,7 @@ static void ocelot_bridge_stp_state_set(
+ 	 * a source for the other ports.
+ 	 */
+ 	for (p = 0; p < ocelot->num_phys_ports; p++) {
+-		if (ocelot->bridge_fwd_mask & BIT(p)) {
++		if (p == ocelot->cpu || (ocelot->bridge_fwd_mask & BIT(p))) {
+ 			unsigned long mask = ocelot->bridge_fwd_mask & ~BIT(p);
+ 
+ 			for (i = 0; i < ocelot->num_phys_ports; i++) {
+@@ -1398,15 +1398,18 @@ static void ocelot_bridge_stp_state_set(
+ 				}
+ 			}
+ 
+-			ocelot_write_rix(ocelot,
+-					 BIT(ocelot->num_phys_ports) | mask,
++			/* Avoid the NPI port from looping back to itself */
++			if (p != ocelot->cpu)
++				mask |= BIT(ocelot->cpu);
++
++			ocelot_write_rix(ocelot, mask,
+ 					 ANA_PGID_PGID, PGID_SRC + p);
+ 		} else {
+ 			/* Only the CPU port, this is compatible with link
+ 			 * aggregation.
+ 			 */
+ 			ocelot_write_rix(ocelot,
+-					 BIT(ocelot->num_phys_ports),
++					 BIT(ocelot->cpu),
+ 					 ANA_PGID_PGID, PGID_SRC + p);
+ 		}
+ 	}