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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2022-07-03 16:46:35 +0000 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2022-07-03 19:58:31 +0200 |
| commit | be0639063a701254677bb982d8e28a71a931433f (patch) | |
| tree | 47c329b76b07a78779817ee0cfd52cfcbc9a57f1 /target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch | |
| parent | 60e88fde77ea413fc2fb367cdcc47d5282d391e3 (diff) | |
| download | upstream-be0639063a701254677bb982d8e28a71a931433f.tar.gz upstream-be0639063a701254677bb982d8e28a71a931433f.tar.bz2 upstream-be0639063a701254677bb982d8e28a71a931433f.zip | |
kernel: bump 5.4 to 5.4.203
Merged upstream:
bcm27xx/patches-5.4/950-1014-Revert-mailbox-avoid-timer-start-from-callback.patch
generic/backport-5.4/080-wireguard-0021-crypto-blake2s-generic-C-library-implementation-and-.patch
Manually adapted:
layerscape/patches-5.4/801-audio-0005-Revert-ASoC-fsl_sai-Add-support-for-SAI-new-version.patch
oxnas/patches-5.4/100-oxnas-clk-plla-pllb.patch
Compile-tested: lantiq/xrx200
Run-tested: lantiq/xrx200
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch b/target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch index 8fa0bca935..3759eccb76 100644 --- a/target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch +++ b/target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch @@ -101,9 +101,9 @@ Signed-off-by: David S. Miller <davem@davemloft.net> /* Allow broadcast MAC frames. */ for (i = ocelot->num_phys_ports + 1; i < PGID_CPU; i++) { u32 val = ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports - 1, 0)); -@@ -2326,13 +2354,6 @@ int ocelot_init(struct ocelot *ocelot) - ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, PGID_MCIPV4); - ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, PGID_MCIPV6); +@@ -2330,13 +2358,6 @@ int ocelot_init(struct ocelot *ocelot) + ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)), + ANA_PGID_PGID, PGID_MCIPV6); - /* CPU port Injection/Extraction configuration */ - ocelot_write_rix(ocelot, QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE | |