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authorHauke Mehrtens <hauke@hauke-m.de>2021-12-05 16:43:36 +0000
committerHauke Mehrtens <hauke@hauke-m.de>2021-12-12 20:08:17 +0100
commit14940aee4566cff33fff9e068fb9559a1925cf44 (patch)
tree3b95865893c878cb915970faffe6a411299d4cee /target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch
parent06547e0a58daf768ff9776339cd31231dcd5c0ea (diff)
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kernel: bump 5.4 to 5.4.163
Removed upstreamed: target/linux/mvebu/patches-5.4/001-PCI-aardvark-Wait-for-endpoint-to-be-ready-before-tr.patch target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch target/linux/mvebu/patches-5.4/020-arm64-dts-marvell-armada-37xx-Set-pcie_reset_pin-to-.patch The following patch does not apply to upstream any more and needs some more work to make it work fully again. I am not sure if we are still able to set the UART to a none standard baud rate. target/linux/ath79/patches-5.4/921-serial-core-add-support-for-boot-console-with-arbitr.patch These patches needed manually changes: target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch target/linux/ipq806x/patches-5.4/0065-arm-override-compiler-flags.patch target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch target/linux/mvebu/patches-5.4/019-PCI-aardvark-Add-PHY-support.patch target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch All others updated automatically. Compile-tested on: malta/le, armvirt/64, lantiq/xrx200 Runtime-tested on: malta/le, armvirt/64, lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch')
-rw-r--r--target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch6
1 files changed, 3 insertions, 3 deletions
diff --git a/target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch b/target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch
index 4f5ab9ad5b..8fa0bca935 100644
--- a/target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch
+++ b/target/linux/layerscape/patches-5.4/701-net-0251-net-mscc-ocelot-split-assignment-of-the-cpu-port-int.patch
@@ -32,7 +32,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
/* Set vlan ingress filter mask to all ports but the CPU port by
* default.
*/
-@@ -2226,11 +2220,52 @@ int ocelot_probe_port(struct ocelot *oce
+@@ -2223,11 +2217,52 @@ int ocelot_probe_port(struct ocelot *oce
}
EXPORT_SYMBOL(ocelot_probe_port);
@@ -87,7 +87,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
ocelot->lags = devm_kcalloc(ocelot->dev, ocelot->num_phys_ports,
sizeof(u32), GFP_KERNEL);
-@@ -2310,13 +2345,6 @@ int ocelot_init(struct ocelot *ocelot)
+@@ -2307,13 +2342,6 @@ int ocelot_init(struct ocelot *ocelot)
ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, PGID_SRC + port);
}
@@ -101,7 +101,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
/* Allow broadcast MAC frames. */
for (i = ocelot->num_phys_ports + 1; i < PGID_CPU; i++) {
u32 val = ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports - 1, 0));
-@@ -2329,13 +2357,6 @@ int ocelot_init(struct ocelot *ocelot)
+@@ -2326,13 +2354,6 @@ int ocelot_init(struct ocelot *ocelot)
ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, PGID_MCIPV4);
ocelot_write_rix(ocelot, 0, ANA_PGID_PGID, PGID_MCIPV6);