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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2021-10-22 22:09:16 +0200 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2021-10-22 22:12:24 +0200 |
| commit | 9501ce909f54b87dab95f17c0408a4962365e130 (patch) | |
| tree | 347a32c972405116366ad2bdc3f7a33b72ddab64 /target/linux/layerscape/patches-5.4/302-dts-0093-arm64-dts-fsl-Specify-phy-mode-for-CPU-ports.patch | |
| parent | 9fcb5c367e8587c9626798ce3814a3ae2948e397 (diff) | |
| download | upstream-9501ce909f54b87dab95f17c0408a4962365e130.tar.gz upstream-9501ce909f54b87dab95f17c0408a4962365e130.tar.bz2 upstream-9501ce909f54b87dab95f17c0408a4962365e130.zip | |
layerscape: Fix build in dtb
This fixes a kernel build problem.
The removed parts of the patch are already applied upstream.
Fixes: 9ad3ef27b9ce ("kernel: bump 5.4 to 5.4.153")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/302-dts-0093-arm64-dts-fsl-Specify-phy-mode-for-CPU-ports.patch')
| -rw-r--r-- | target/linux/layerscape/patches-5.4/302-dts-0093-arm64-dts-fsl-Specify-phy-mode-for-CPU-ports.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0093-arm64-dts-fsl-Specify-phy-mode-for-CPU-ports.patch b/target/linux/layerscape/patches-5.4/302-dts-0093-arm64-dts-fsl-Specify-phy-mode-for-CPU-ports.patch index 119a9b00c2..cf99f33251 100644 --- a/target/linux/layerscape/patches-5.4/302-dts-0093-arm64-dts-fsl-Specify-phy-mode-for-CPU-ports.patch +++ b/target/linux/layerscape/patches-5.4/302-dts-0093-arm64-dts-fsl-Specify-phy-mode-for-CPU-ports.patch @@ -15,7 +15,7 @@ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi -@@ -813,6 +813,8 @@ +@@ -793,6 +793,8 @@ /* internal to-cpu ports */ port@4 { reg = <4>; @@ -24,7 +24,7 @@ Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> fixed-link { speed = <1000>; full-duplex; -@@ -821,6 +823,8 @@ +@@ -801,6 +803,8 @@ port@5 { reg = <5>; ethernet = <&enetc_port3>; |