kernel: delete Linux 5.4 config and patches

As the upcoming release will be based on Linux 5.10 only, remove all
kernel configuration as well as patches for Linux 5.4.
There were no targets still actively using Linux 5.4.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 3a14580411adfb75f9a44eded9f41245b9e44606)

1 files changed, 0 insertions, 574 deletions

diff --git a/target/linux/layerscape/patches-5.4/302-dts-0063-arm64-dts-fsl-remove-backplane-support.patch b/target/linux/layerscape/patches-5.4/302-dts-0063-arm64-dts-fsl-remove-backplane-support.patch
deleted file mode 100644
index 749df043e0..0000000000
--- a/target/linux/layerscape/patches-5.4/302-dts-0063-arm64-dts-fsl-remove-backplane-support.patch
+++ /dev/null
@@ -1,574 +0,0 @@
-From 278bacf54eabe391159cef3112f8e8bf0fa7b891 Mon Sep 17 00:00:00 2001
-From: Florinel Iordache <florinel.iordache@nxp.com>
-Date: Mon, 27 May 2019 15:57:05 +0300
-Subject: [PATCH] arm64: dts: fsl: remove backplane support
-
-Remove entire backplane support from device tree for all supported platforms
-
-Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
----
- .../boot/dts/freescale/fsl-ls1046a-qds-sdk.dts     |  4 -
- .../boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts     | 34 --------
- arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi     |  5 --
- arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts  | 26 -------
- arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi     | 46 -----------
- arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts  | 58 --------------
- arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi     | 90 ----------------------
- arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts  | 60 ---------------
- arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi     | 86 ---------------------
- .../boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi    |  4 +-
- .../boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi    |  4 +-
- 11 files changed, 4 insertions(+), 413 deletions(-)
-
---- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts
-@@ -259,10 +259,6 @@ pcie@3600000 {
- 	dma-coherent;
- };
- 
--&serdes1 {
--	dma-coherent;
--};
--
- &fsldpaa {
- 	dma-coherent;
- };
---- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts
-@@ -100,36 +100,6 @@ pcie@3600000 {
- 	compatible = "fsl,fman", "simple-bus";
- };
- 
--&mdio9 {
--	pcsphy6: ethernet-phy@0 {
--		backplane-mode = "10gbase-kr";
--		compatible = "ethernet-phy-ieee802.3-c45";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0x8C0 0x40>;   /* lane D */
--	};
--};
--
--&mdio10 {
--	pcsphy7: ethernet-phy@0 {
--		backplane-mode = "10gbase-kr";
--		compatible = "ethernet-phy-ieee802.3-c45";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0x880 0x40>;   /* lane C */
--	};
--};
--
--/* Update MAC connections to backplane PHYs
-- * &mac9 {
-- *	phy-handle = <&pcsphy6>;
-- *};
-- *
-- *&mac10 {
-- *	phy-handle = <&pcsphy7>;
-- *};
--*/
--
- &clockgen {
- 	dma-coherent;
- };
-@@ -298,10 +268,6 @@ pcie@3600000 {
- 	dma-coherent;
- };
- 
--&serdes1 {
--	dma-coherent;
--};
--
- &fsldpaa {
- 	dma-coherent;
- };
---- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
-@@ -680,11 +680,6 @@
- 				     <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
- 		};
- 
--		serdes1: serdes@1ea0000 {
--			reg = <0x0 0x1ea0000 0 0x00002000>;
--			compatible = "fsl,serdes-10g";
--		};
--
- 		pcie@3400000 {
- 			compatible = "fsl,ls1046a-pcie";
- 			reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
---- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts
-@@ -170,29 +170,3 @@
- &sata {
- 	status = "okay";
- };
--
--&pcs_mdio1 {
--		pcs_phy1: ethernet-phy@0 {
--		backplane-mode = "10gbase-kr";
--		compatible = "ethernet-phy-ieee802.3-c45";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0x840 0x40>;/* lane B */
--	};
--};
--
--&pcs_mdio2 {
--		pcs_phy2: ethernet-phy@0 {
--		backplane-mode = "10gbase-kr";
--		compatible = "ethernet-phy-ieee802.3-c45";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0x800 0x40>;/* lane A */
--	};
--};
--
--/* Update DPMAC connections to backplane PHYs, under SerDes 0x1D_0xXX.
-- * &dpmac1 {
-- *	phy-handle = <&pcs_phy1>;
-- * };
-- */
---- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
-@@ -183,12 +183,6 @@
- 			little-endian;
- 		};
- 
--		serdes1: serdes@1ea0000 {
--				compatible = "fsl,serdes-10g";
--				reg = <0x0 0x1ea0000 0 0x00002000>;
--				little-endian;
--		};
--
- 		tmu: tmu@1f80000 {
- 			compatible = "fsl,qoriq-tmu";
- 			reg = <0x0 0x1f80000 0x0 0x10000>;
-@@ -333,46 +327,6 @@
- 
- 			#address-cells = <1>;
- 			#size-cells = <0>;
--		};
--
--		pcs_mdio1: mdio@8c07000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c07000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio2: mdio@8c0b000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c0b000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio3: mdio@8c0f000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c0f000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio4: mdio@8c13000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c13000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
- 		};
- 
- 		ifc: ifc@2240000 {
---- a/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts
-@@ -71,64 +71,6 @@
- 	};
- };
- 
--&pcs_mdio1 {
--		pcs_phy1: ethernet-phy@0 {
--		backplane-mode = "10gbase-kr";
--		compatible = "ethernet-phy-ieee802.3-c45";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0x9C0 0x40>;/* lane H */
--	};
--};
--
--&pcs_mdio2 {
--		pcs_phy2: ethernet-phy@0 {
--		backplane-mode = "10gbase-kr";
--		compatible = "ethernet-phy-ieee802.3-c45";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0x980 0x40>;/* lane G */
--	};
--};
--
--&pcs_mdio3 {
--		pcs_phy3: ethernet-phy@0 {
--		backplane-mode = "10gbase-kr";
--		compatible = "ethernet-phy-ieee802.3-c45";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0x940 0x40>;/* lane F */
--	};
--};
--
--&pcs_mdio4 {
--		pcs_phy4: ethernet-phy@0 {
--		backplane-mode = "10gbase-kr";
--		compatible = "ethernet-phy-ieee802.3-c45";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0x900 0x40>;/* lane E */
--	};
--};
--
--/* Update DPMAC connections to backplane PHYs, under SerDes 0x2a_0xXX.
-- * &dpmac1 {
-- *	phy-handle = <&pcs_phy1>;
-- * };
-- *
-- * &dpmac2 {
-- *	phy-handle = <&pcs_phy2>;
-- * };
-- *
-- * &dpmac3 {
-- *	phy-handle = <&pcs_phy3>;
-- * };
-- *
-- * &dpmac4 {
-- *	phy-handle = <&pcs_phy4>;
-- * };
-- */
--
- /* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
- &dpmac9 {
- 	phy-handle = <&mdio0_phy12>;
---- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
-@@ -549,90 +549,6 @@
- 			#size-cells = <0>;
- 		};
- 
--		pcs_mdio1: mdio@8c07000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c07000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio2: mdio@8c0b000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c0b000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio3: mdio@8c0f000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c0f000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio4: mdio@8c13000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c13000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio5: mdio@8c17000 {
--			status = "disabled";
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c17000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio6: mdio@8c1b000 {
--			status = "disabled";
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c1b000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio7: mdio@8c1f000 {
--			status = "disabled";
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c1f000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio8: mdio@8c23000 {
--			status = "disabled";
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c23000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
- 		i2c0: i2c@2000000 {
- 			status = "disabled";
- 			compatible = "fsl,vf610-i2c", "fsl,ls208xa-vf610-i2c";
-@@ -834,12 +750,6 @@
- 			snps,host-vbus-glitches;
- 		};
- 
--		serdes1: serdes@1ea0000 {
--				compatible = "fsl,serdes-10g";
--				reg = <0x0 0x1ea0000 0 0x00002000>;
--				little-endian;
--		};
--
- 		ccn@4000000 {
- 			compatible = "arm,ccn-504";
- 			reg = <0x0 0x04000000 0x0 0x01000000>;
---- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
-@@ -316,46 +316,6 @@
- 	status = "okay";
- };
- 
--&pcs_mdio1 {
--	pcs_phy1: ethernet-phy@0 {
--		compatible = "ethernet-phy-ieee802.3-c45";
--		backplane-mode = "40gbase-kr";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0xF00 0xE00 0xD00 0xC00>; /* lanes H, G, F, E */
--	};
--};
--
--&pcs_mdio2 {
--	pcs_phy2: ethernet-phy@0 {
--		compatible = "ethernet-phy-ieee802.3-c45";
--		backplane-mode = "40gbase-kr";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0xB00 0xA00 0x900 0x800>; /* lanes D, C, B, A */
--	};
--};
--
--&pcs_mdio3 {
--	pcs_phy3: ethernet-phy@0 {
--		compatible = "ethernet-phy-ieee802.3-c45";
--		backplane-mode = "10gbase-kr";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0xF00 0x100>; /* lane H */
--	};
--};
--
--&pcs_mdio4 {
--	pcs_phy4: ethernet-phy@0 {
--		compatible = "ethernet-phy-ieee802.3-c45";
--		backplane-mode = "10gbase-kr";
--		reg = <0x0>;
--		fsl,lane-handle = <&serdes1>;
--		fsl,lane-reg = <0xE00 0x100>; /* lane G */
--	};
--};
--
- &sata0 {
- 	status = "okay";
- };
-@@ -371,23 +331,3 @@
- &sata3 {
- 	status = "okay";
- };
--
--/* Update DPMAC connections to 40G backplane PHYs
-- * &dpmac1 {
-- *	phy-handle = <&pcs_phy1>;
-- * };
-- * 
-- * &dpmac2 {
-- *	phy-handle = <&pcs_phy2>;
-- * };
-- */
--
--/* Update DPMAC connections to 10G backplane PHYs
-- * &dpmac3 {
-- *	phy-handle = <&pcs_phy3>;
-- * };
-- * 
-- * &dpmac4 {
-- *	phy-handle = <&pcs_phy4>;
-- * };
-- */
---- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
-@@ -500,92 +500,6 @@
- 			status = "disabled";
- 		};
- 
--		pcs_mdio1: mdio@8c07000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c07000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio2: mdio@8c0b000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c0b000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio3: mdio@8c0f000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c0f000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio4: mdio@8c13000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c13000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio5: mdio@8c17000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c17000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio6: mdio@8c1b000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c1b000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio7: mdio@8c1f000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c1f000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		pcs_mdio8: mdio@8c23000 {
--			compatible = "fsl,fman-memac-mdio";
--			reg = <0x0 0x8c23000 0x0 0x1000>;
--			device_type = "mdio";
--			little-endian;
--
--			#address-cells = <1>;
--			#size-cells = <0>;
--		};
--
--		serdes1: serdes@1ea0000 {
--				compatible = "fsl,serdes-28g";
--				reg = <0x0 0x1ea0000 0 0x00002000>;
--				little-endian;
--		};
--
- 		i2c0: i2c@2000000 {
- 			compatible = "fsl,vf610-i2c";
- 			#address-cells = <1>;
---- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
-+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi
-@@ -22,7 +22,7 @@ fman@1a00000 {
- 		fsl,qman-channel-id = <0x800>;
- 	};
- 
--	mac9: ethernet@f0000 {
-+	ethernet@f0000 {
- 		cell-index = <0x8>;
- 		compatible = "fsl,fman-memac";
- 		reg = <0xf0000 0x1000>;
-@@ -30,7 +30,7 @@ fman@1a00000 {
- 		pcsphy-handle = <&pcsphy6>;
- 	};
- 
--	mdio9: mdio@f1000 {
-+	mdio@f1000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";
---- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
-+++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi
-@@ -22,7 +22,7 @@ fman@1a00000 {
- 		fsl,qman-channel-id = <0x801>;
- 	};
- 
--	mac10: ethernet@f2000 {
-+	ethernet@f2000 {
- 		cell-index = <0x9>;
- 		compatible = "fsl,fman-memac";
- 		reg = <0xf2000 0x1000>;
-@@ -30,7 +30,7 @@ fman@1a00000 {
- 		pcsphy-handle = <&pcsphy7>;
- 	};
- 
--	mdio10: mdio@f3000 {
-+	mdio@f3000 {
- 		#address-cells = <1>;
- 		#size-cells = <0>;
- 		compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio";