diff options
author | Yangbo Lu <yangbo.lu@nxp.com> | 2020-04-10 10:47:05 +0800 |
---|---|---|
committer | Petr Štetiar <ynezz@true.cz> | 2020-05-07 12:53:06 +0200 |
commit | cddd4591404fb4c53dc0b3c0b15b942cdbed4356 (patch) | |
tree | 392c1179de46b0f804e3789edca19069b64e6b44 /target/linux/layerscape/patches-5.4/302-dts-0026-arm64-dts-nxp-add-more-thermal-zone-support.patch | |
parent | d1d2c0b5579ea4f69a42246c9318539d61ba1999 (diff) | |
download | upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.gz upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.tar.bz2 upstream-cddd4591404fb4c53dc0b3c0b15b942cdbed4356.zip |
layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/
For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.
The patches are sorted into the following categories:
301-arch-xxxx
302-dts-xxxx
303-core-xxxx
701-net-xxxx
801-audio-xxxx
802-can-xxxx
803-clock-xxxx
804-crypto-xxxx
805-display-xxxx
806-dma-xxxx
807-gpio-xxxx
808-i2c-xxxx
809-jailhouse-xxxx
810-keys-xxxx
811-kvm-xxxx
812-pcie-xxxx
813-pm-xxxx
814-qe-xxxx
815-sata-xxxx
816-sdhc-xxxx
817-spi-xxxx
818-thermal-xxxx
819-uart-xxxx
820-usb-xxxx
821-vfio-xxxx
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-5.4/302-dts-0026-arm64-dts-nxp-add-more-thermal-zone-support.patch')
-rw-r--r-- | target/linux/layerscape/patches-5.4/302-dts-0026-arm64-dts-nxp-add-more-thermal-zone-support.patch | 314 |
1 files changed, 314 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-5.4/302-dts-0026-arm64-dts-nxp-add-more-thermal-zone-support.patch b/target/linux/layerscape/patches-5.4/302-dts-0026-arm64-dts-nxp-add-more-thermal-zone-support.patch new file mode 100644 index 0000000000..6eba875f5c --- /dev/null +++ b/target/linux/layerscape/patches-5.4/302-dts-0026-arm64-dts-nxp-add-more-thermal-zone-support.patch @@ -0,0 +1,314 @@ +From 314a3a062e5e8fe76b3c43a8731ffe4bd58bc1be Mon Sep 17 00:00:00 2001 +From: Yuantian Tang <andy.tang@nxp.com> +Date: Mon, 5 Nov 2018 17:40:20 +0800 +Subject: [PATCH] arm64: dts: nxp: add more thermal zone support + +To enable all the supported thermal sensors, add sensor id information +to thermal zone node. +Dts for ls1012a, ls1046a, ls1043a, ls1088a are updated. + +Signed-off-by: Yuantian Tang <andy.tang@nxp.com> +--- + arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 39 ++++------------ + arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 61 ++++++++++++-------------- + arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 57 ++++++++++-------------- + arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 53 +++++++--------------- + 4 files changed, 75 insertions(+), 135 deletions(-) + +--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +@@ -28,7 +28,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- cpu0: cpu@0 { ++ cooling_map0: cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; +@@ -100,36 +100,7 @@ + mask = <0x02>; + }; + +- thermal-zones { +- cpu_thermal: cpu-thermal { +- polling-delay-passive = <1000>; +- polling-delay = <5000>; +- thermal-sensors = <&tmu 0>; +- +- trips { +- cpu_alert: cpu-alert { +- temperature = <85000>; +- hysteresis = <2000>; +- type = "passive"; +- }; +- +- cpu_crit: cpu-crit { +- temperature = <95000>; +- hysteresis = <2000>; +- type = "critical"; +- }; +- }; +- +- cooling-maps { +- map0 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu0 THERMAL_NO_LIMIT +- THERMAL_NO_LIMIT>; +- }; +- }; +- }; +- }; ++ #include "fsl-tmu.dtsi" + + soc { + compatible = "simple-bus"; +@@ -572,3 +543,9 @@ + }; + }; + }; ++ ++&thermal_zones { ++ thermal-zone0 { ++ status = "okay"; ++ }; ++}; +--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +@@ -39,7 +39,7 @@ + * + * Currently supported enable-method is psci v0.2 + */ +- cpu0: cpu@0 { ++ cooling_map0: cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; +@@ -148,38 +148,7 @@ + mask = <0x02>; + }; + +- thermal-zones { +- cpu_thermal: cpu-thermal { +- polling-delay-passive = <1000>; +- polling-delay = <5000>; +- +- thermal-sensors = <&tmu 3>; +- +- trips { +- cpu_alert: cpu-alert { +- temperature = <85000>; +- hysteresis = <2000>; +- type = "passive"; +- }; +- cpu_crit: cpu-crit { +- temperature = <95000>; +- hysteresis = <2000>; +- type = "critical"; +- }; +- }; +- +- cooling-maps { +- map0 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; +- }; +- }; +- }; +- }; ++ #include "fsl-tmu.dtsi" + + timer { + compatible = "arm,armv8-timer"; +@@ -915,3 +884,29 @@ + + #include "qoriq-qman-portals.dtsi" + #include "qoriq-bman-portals.dtsi" ++ ++&thermal_zones { ++ thermal-zone0 { ++ status = "okay"; ++ }; ++ ++ thermal-zone1 { ++ status = "okay"; ++ }; ++ ++ thermal-zone2 { ++ status = "okay"; ++ }; ++ ++ thermal-zone3 { ++ status = "okay"; ++ }; ++ ++ thermal-zone4 { ++ status = "okay"; ++ }; ++ ++ thermal-zone5 { ++ status = "okay"; ++ }; ++}; +--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +@@ -34,7 +34,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- cpu0: cpu@0 { ++ cooling_map0: cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a72"; + reg = <0x0>; +@@ -116,38 +116,7 @@ + mask = <0x02>; + }; + +- thermal-zones { +- cpu_thermal: cpu-thermal { +- polling-delay-passive = <1000>; +- polling-delay = <5000>; +- thermal-sensors = <&tmu 3>; +- +- trips { +- cpu_alert: cpu-alert { +- temperature = <85000>; +- hysteresis = <2000>; +- type = "passive"; +- }; +- +- cpu_crit: cpu-crit { +- temperature = <95000>; +- hysteresis = <2000>; +- type = "critical"; +- }; +- }; +- +- cooling-maps { +- map0 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; +- }; +- }; +- }; +- }; ++ #include "fsl-tmu.dtsi" + + timer { + compatible = "arm,armv8-timer"; +@@ -882,3 +851,25 @@ + + #include "qoriq-qman-portals.dtsi" + #include "qoriq-bman-portals.dtsi" ++ ++&thermal_zones { ++ thermal-zone0 { ++ status = "okay"; ++ }; ++ ++ thermal-zone1 { ++ status = "okay"; ++ }; ++ ++ thermal-zone2 { ++ status = "okay"; ++ }; ++ ++ thermal-zone3 { ++ status = "okay"; ++ }; ++ ++ thermal-zone4 { ++ status = "okay"; ++ }; ++}; +--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +@@ -25,7 +25,7 @@ + #size-cells = <0>; + + /* We have 2 clusters having 4 Cortex-A53 cores each */ +- cpu0: cpu@0 { ++ cooling_map0: cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0>; +@@ -61,7 +61,7 @@ + #cooling-cells = <2>; + }; + +- cpu4: cpu@100 { ++ cooling_map1: cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x100>; +@@ -128,42 +128,7 @@ + }; + }; + +- thermal-zones { +- cpu_thermal: cpu-thermal { +- polling-delay-passive = <1000>; +- polling-delay = <5000>; +- thermal-sensors = <&tmu 0>; +- +- trips { +- cpu_alert: cpu-alert { +- temperature = <85000>; +- hysteresis = <2000>; +- type = "passive"; +- }; +- +- cpu_crit: cpu-crit { +- temperature = <95000>; +- hysteresis = <2000>; +- type = "critical"; +- }; +- }; +- +- cooling-maps { +- map0 { +- trip = <&cpu_alert>; +- cooling-device = +- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, +- <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; +- }; +- }; +- }; +- }; ++ #include "fsl-tmu.dtsi" + + timer { + compatible = "arm,armv8-timer"; +@@ -879,3 +844,15 @@ + }; + }; + }; ++ ++#include "fsl-tmu-map1.dtsi" ++ ++&thermal_zones { ++ thermal-zone0 { ++ status = "okay"; ++ }; ++ ++ thermal-zone1 { ++ status = "okay"; ++ }; ++}; |