kernel: delete Linux 5.4 config and patches

As the upcoming release will be based on Linux 5.10 only, remove all
kernel configuration as well as patches for Linux 5.4.
There were no targets still actively using Linux 5.4.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 3a14580411adfb75f9a44eded9f41245b9e44606)

1 files changed, 0 insertions, 461 deletions

diff --git a/target/linux/layerscape/patches-5.4/302-dts-0006-arm64-dts-ls1012a-accumulated-change-for-ls1012a-boa.patch b/target/linux/layerscape/patches-5.4/302-dts-0006-arm64-dts-ls1012a-accumulated-change-for-ls1012a-boa.patch
deleted file mode 100644
index 413fcaf120..0000000000
--- a/target/linux/layerscape/patches-5.4/302-dts-0006-arm64-dts-ls1012a-accumulated-change-for-ls1012a-boa.patch
+++ /dev/null
@@ -1,461 +0,0 @@
-From 8fd1ab38e922383fa87db60c48c44ab0d5e6f1c1 Mon Sep 17 00:00:00 2001
-From: Li Yang <leoyang.li@nxp.com>
-Date: Thu, 2 May 2019 15:52:49 -0500
-Subject: [PATCH] arm64: dts: ls1012a: accumulated change for ls1012a boards
-
-commit 65c558ec270003e8e99cb58c940d3b913d08fa39
-Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
-Date:   Tue May 15 08:47:19 2018 +0800
-
-    arm64: dts: ls1012a: correct the register range of dcfg
-
-    Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
-
-commit 8f7b4cded4ea1fca53516ae8f5d5bc89af291f26
-Author: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
-Date:   Mon May 7 11:52:04 2018 +0530
-
-    arm64: dts: ls1012a: Add LS1012A-FRWY board support
-
-    LS1012A-FRWY is a different design from LS1012A-FRDM,
-    but has some common SoC features. Key feature on this
-    board is 2x1G SGMII PFE MAC, Micro SD, USB 3.0, DDR,
-    QuadSPI, Audio, UART.
-
-    Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
-
-commit 94fc77837b3b6f4213a49b29ddc3e09e38ae5fbb
-Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
-Date:   Mon Apr 2 16:16:47 2018 +0800
-
-    arm64: dts: ls1012a: add dts entry for A-010650
-
-    Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
-
-commit d4164a6d8cffd8f09c451073754834d58b7ace19
-Author: Suresh Gupta <suresh.gupta@nxp.com>
-Date:   Thu Feb 1 23:44:15 2018 +0530
-
-    arm64: dts: freescale: ls1012a: Add DT nodes for qspi
-
-    Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
-    Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
-
-commit 4fdc98a03492b732a48426a4180f7d6a36847e71
-Author: Zhang Ying-22455 <ying.zhang22455@nxp.com>
-Date:   Wed Nov 1 10:31:47 2017 +0800
-
-    arm64: dts: ls1012a: correct the i2c clock to 1/4 platform pll
-
-    Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
-
-commit bb534725996b92aff853a4dee43738629fd4ac08
-Author: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
-Date:   Wed Nov 29 06:31:23 2017 +0530
-
-    arm64: dts: freescale: ls1012a: Disable PCIe node as default
-
-    Keep PCIe node in "disabled" status as SoC default.
-    Only enable it for boards with PCIe circuit designed,
-    such as LS1012ARDB and LS1012AQDS.
-
-    Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
-
-commit 6b9a3244baba2c5126f349800ecaad83ba97ee47
-Author: Calvin Johnson <calvin.johnson@nxp.com>
-Date:   Mon Oct 16 12:25:19 2017 +0530
-
-    arm64: dts: freescale: ls1012a: fix RGMII tx delay issue
-
-    Recently logic to enable RGMII tx delay was changed by
-    below patch.
-
-    https://patchwork.kernel.org/patch/9447581/
-
-    Based on the patch, enabling tx delay again using rgmii-txid.
-
-    Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-    Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
-
-commit 1e17e247088f6e2c08041559e38053b70a9d2bbe
-Author: Calvin Johnson <calvin.johnson@nxp.com>
-Date:   Sat Sep 16 14:20:23 2017 +0530
-
-    arm64: dts: freescale: ls1012a: update with pppfe support
-
-            Update ls1012a dtsi and platform dts files with
-    support for ppfe.
-
-    Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
-    Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
-
-commit e9661ed864d2a9d437057f97729410bb9af994f2
-Author: Suresh Gupta <suresh.gupta@nxp.com>
-Date:   Tue May 16 17:17:21 2017 +0530
-
-    arm64: dts: ls1012a: add the DTS node for QSPI support
-
-    There is a s25fs512s qspi flash on QDS, RDB and FRDM board.
-
-    Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
-
-commit ed9c51239461fe0322da2e93f50033ea0d05bc4f
-Author: Chenhui Zhao <chenhui.zhao@nxp.com>
-Date:   Fri May 5 17:45:15 2017 +0800
-
-    arm64: dts: ls1012a: add ftm0 node
-
-    Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
----
- arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts | 58 ++++++++++++++++++
- arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts  | 62 ++++++++++++++++++++
- arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts  | 62 ++++++++++++++++++++
- arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi     | 68 +++++++++++++++++++++-
- 4 files changed, 248 insertions(+), 2 deletions(-)
-
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
-@@ -13,6 +13,11 @@
- 	model = "LS1012A Freedom Board";
- 	compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
- 
-+	aliases {
-+		ethernet0 = &pfe_mac0;
-+		ethernet1 = &pfe_mac1;
-+	};
-+
- 	sys_mclk: clock-mclk {
- 		compatible = "fixed-clock";
- 		#clock-cells = <0>;
-@@ -74,6 +79,44 @@
- 	};
- };
- 
-+&pfe {
-+	status = "okay";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	ethernet@0 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x0>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x0>;
-+		phy-mode = "sgmii";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x1>; /* enabled/disabled */
-+		};
-+	};
-+
-+	ethernet@1 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x1>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x1>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x1>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x0>;
-+		phy-mode = "sgmii";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x0>; /* enabled/disabled */
-+		};
-+	};
-+};
-+
- &sai2 {
- 	status = "okay";
- };
-@@ -81,3 +124,18 @@
- &sata {
- 	status = "okay";
- };
-+
-+&qspi {
-+	status = "okay";
-+	qflash0: s25fs512s@0 {
-+		compatible = "spansion,m25p80";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		spi-max-frequency = <20000000>;
-+		m25p,fast-read;
-+		reg = <0>;
-+		spi-rx-bus-width = <2>;
-+		spi-tx-bus-width = <2>;
-+	};
-+
-+};
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
-@@ -13,6 +13,11 @@
- 	model = "LS1012A QDS Board";
- 	compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
- 
-+	aliases {
-+		ethernet0 = &pfe_mac0;
-+		ethernet1 = &pfe_mac1;
-+	};
-+
- 	sys_mclk: clock-mclk {
- 		compatible = "fixed-clock";
- 		#clock-cells = <0>;
-@@ -57,6 +62,10 @@
- 	};
- };
- 
-+&pcie {
-+	status = "okay";
-+};
-+
- &dspi {
- 	bus-num = <0>;
- 	status = "okay";
-@@ -128,6 +137,44 @@
- 	};
- };
- 
-+&pfe {
-+	status = "okay";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	ethernet@0 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x0>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x1>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x2>;
-+		phy-mode = "sgmii-2500";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x1>; /* enabled/disabled */
-+		};
-+	};
-+
-+	ethernet@1 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x1>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x1>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x3>;
-+		phy-mode = "sgmii-2500";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x0>; /* enabled/disabled */
-+		};
-+	};
-+};
-+
- &sai2 {
- 	status = "okay";
- };
-@@ -135,3 +182,18 @@
- &sata {
- 	status = "okay";
- };
-+
-+&qspi {
-+	status = "okay";
-+	qflash0: s25fs512s@0 {
-+		compatible = "spansion,m25p80";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		spi-max-frequency = <20000000>;
-+		m25p,fast-read;
-+		reg = <0>;
-+		spi-rx-bus-width = <2>;
-+		spi-tx-bus-width = <2>;
-+	};
-+
-+};
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
-@@ -12,6 +12,15 @@
- / {
- 	model = "LS1012A RDB Board";
- 	compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
-+
-+	aliases {
-+		ethernet0 = &pfe_mac0;
-+		ethernet1 = &pfe_mac1;
-+	};
-+};
-+
-+&pcie {
-+	status = "okay";
- };
- 
- &duart0 {
-@@ -38,3 +47,56 @@
- &sata {
- 	status = "okay";
- };
-+
-+&pfe {
-+	status = "okay";
-+	#address-cells = <1>;
-+	#size-cells = <0>;
-+
-+	ethernet@0 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x0>;	/* GEM_ID */
-+		fsl,gemac-bus-id = <0x0>;	/* BUS_ID */
-+		fsl,gemac-phy-id = <0x2>;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x0>;
-+		phy-mode = "sgmii";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x1>; /* enabled/disabled */
-+		};
-+	};
-+
-+	ethernet@1 {
-+		compatible = "fsl,pfe-gemac-port";
-+		#address-cells = <1>;
-+		#size-cells = <0>;
-+		reg = <0x1>;	/* GEM_ID */
-+		fsl,gemac-bus-id = < 0x1 >;	/* BUS_ID */
-+		fsl,gemac-phy-id = < 0x1 >;	/* PHY_ID */
-+		fsl,mdio-mux-val = <0x0>;
-+		phy-mode = "rgmii-txid";
-+		fsl,pfe-phy-if-flags = <0x0>;
-+
-+		mdio@0 {
-+			reg = <0x0>; /* enabled/disabled */
-+		};
-+	};
-+};
-+
-+&qspi {
-+	status = "okay";
-+	qflash0: s25fs512s@0 {
-+		compatible = "spansion,m25p80";
-+		#address-cells = <1>;
-+		#size-cells = <1>;
-+		spi-max-frequency = <20000000>;
-+		m25p,fast-read;
-+		reg = <0>;
-+		spi-rx-bus-width = <2>;
-+		spi-tx-bus-width = <2>;
-+	};
-+
-+};
---- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
-+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
-@@ -261,7 +261,7 @@
- 		dcfg: dcfg@1ee0000 {
- 			compatible = "fsl,ls1012a-dcfg",
- 				     "syscon";
--			reg = <0x0 0x1ee0000 0x0 0x10000>;
-+			reg = <0x0 0x1ee0000 0x0 0x1000>;
- 			big-endian;
- 		};
- 
-@@ -318,13 +318,23 @@
- 			#thermal-sensor-cells = <1>;
- 		};
- 
-+		ftm0: ftm0@29d0000 {
-+			compatible = "fsl,ftm-alarm";
-+			reg = <0x0 0x29d0000 0x0 0x10000>,
-+			      <0x0 0x1ee2140 0x0 0x4>;
-+			reg-names = "ftm", "FlexTimer1";
-+			interrupts = <0 86 0x4>;
-+			big-endian;
-+		};
-+
- 		i2c0: i2c@2180000 {
--			compatible = "fsl,vf610-i2c";
-+			compatible = "fsl,vf610-i2c", "fsl,ls1012a-vf610-i2c";
- 			#address-cells = <1>;
- 			#size-cells = <0>;
- 			reg = <0x0 0x2180000 0x0 0x10000>;
- 			interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
- 			clocks = <&clockgen 4 3>;
-+			scl-gpios = <&gpio0 13 0>;
- 			status = "disabled";
- 		};
- 
-@@ -396,6 +406,20 @@
- 			big-endian;
- 		};
- 
-+		qspi: spi@1550000 {
-+			compatible = "fsl,ls1012a-qspi", "fsl,ls1021a-qspi";
-+			#address-cells = <1>;
-+			#size-cells = <0>;
-+			reg = <0x0 0x1550000 0x0 0x10000>,
-+				<0x0 0x40000000 0x0 0x10000000>;
-+			reg-names = "QuadSPI", "QuadSPI-memory";
-+			interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>;
-+			clock-names = "qspi_en", "qspi";
-+			clocks = <&clockgen 4 0>, <&clockgen 4 0>;
-+			big-endian;
-+			status = "disabled";
-+		};
-+
- 		sai1: sai@2b50000 {
- 			#sound-dai-cells = <0>;
- 			compatible = "fsl,vf610-sai";
-@@ -500,6 +524,46 @@
- 					<0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;
- 			status = "disabled";
- 		};
-+
-+		rcpm: rcpm@1ee2000 {
-+			compatible = "fsl,ls1012a-rcpm", "fsl,qoriq-rcpm-2.1";
-+			reg = <0x0 0x1ee2000 0x0 0x1000>;
-+			fsl,#rcpm-wakeup-cells = <1>;
-+		};
-+	};
-+
-+	reserved-memory {
-+		#address-cells = <2>;
-+		#size-cells = <2>;
-+		ranges;
-+
-+		pfe_reserved: packetbuffer@83400000 {
-+			reg = <0 0x83400000 0 0xc00000>;
-+		};
-+	};
-+
-+	pfe: pfe@04000000 {
-+		compatible = "fsl,pfe";
-+		reg =   <0x0 0x04000000 0x0 0xc00000>,	/* AXI 16M */
-+			<0x0 0x83400000 0x0 0xc00000>;  /* PFE DDR 12M */
-+		reg-names = "pfe", "pfe-ddr";
-+		fsl,pfe-num-interfaces = <0x2>;
-+		interrupts = <0 172 0x4>,    /* HIF interrupt */
-+			     <0 173 0x4>,    /*HIF_NOCPY interrupt */
-+			     <0 174 0x4>;    /* WoL interrupt */
-+		interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
-+		memory-region = <&pfe_reserved>;
-+		fsl,pfe-scfg = <&scfg 0>;
-+		fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
-+		clocks = <&clockgen 4 0>;
-+		clock-names = "pfe";
-+
-+		status = "okay";
-+		pfe_mac0: ethernet@0 {
-+		};
-+
-+		pfe_mac1: ethernet@1 {
-+		};
- 	};
- 
- 	firmware {