diff options
| author | Hauke Mehrtens <hauke@hauke-m.de> | 2017-01-06 13:53:27 +0100 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2017-01-06 19:38:55 +0100 |
| commit | 88ca6390eab24efda3f6333453cd645b5e20e400 (patch) | |
| tree | aca0017be6abf1534934ec15cac1da4fd30c66f7 /target/linux/layerscape/patches-4.4/8235-pci-layerscape-fix-pci-lut-offset-issue.patch | |
| parent | b9857b21c27c3ba98a400cd797c540baa9f40be1 (diff) | |
| download | upstream-88ca6390eab24efda3f6333453cd645b5e20e400.tar.gz upstream-88ca6390eab24efda3f6333453cd645b5e20e400.tar.bz2 upstream-88ca6390eab24efda3f6333453cd645b5e20e400.zip | |
kernel: bump to 4.4.40
Refresh patches on all 4.4 supported platforms.
Compile & run tested: lantiq/xrx200
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/layerscape/patches-4.4/8235-pci-layerscape-fix-pci-lut-offset-issue.patch')
| -rw-r--r-- | target/linux/layerscape/patches-4.4/8235-pci-layerscape-fix-pci-lut-offset-issue.patch | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/target/linux/layerscape/patches-4.4/8235-pci-layerscape-fix-pci-lut-offset-issue.patch b/target/linux/layerscape/patches-4.4/8235-pci-layerscape-fix-pci-lut-offset-issue.patch index be91046ac1..def79412d7 100644 --- a/target/linux/layerscape/patches-4.4/8235-pci-layerscape-fix-pci-lut-offset-issue.patch +++ b/target/linux/layerscape/patches-4.4/8235-pci-layerscape-fix-pci-lut-offset-issue.patch @@ -8,22 +8,20 @@ Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> drivers/pci/host/pci-layerscape.c | 13 ++++--------- 1 file changed, 4 insertions(+), 9 deletions(-) -diff --git a/drivers/pci/host/pci-layerscape.c b/drivers/pci/host/pci-layerscape.c -index f85ebcf..00feabf 100644 --- a/drivers/pci/host/pci-layerscape.c +++ b/drivers/pci/host/pci-layerscape.c -@@ -158,16 +158,11 @@ static void ls1021_pcie_host_init(struct pcie_port *pp) +@@ -158,16 +158,11 @@ static void ls1021_pcie_host_init(struct static int ls_pcie_link_up(struct pcie_port *pp) { struct ls_pcie *pcie = to_ls_pcie(pp); - u32 state, offset; -- ++ u32 state; + - if (of_get_property(pp->dev->of_node, "fsl,lut_diff", NULL)) - offset = 0x407fc; - else - offset = PCIE_LUT_DBG; -+ u32 state; - +- - state = (ioread32(pcie->lut + offset) >> - pcie->drvdata->ltssm_shift) & - LTSSM_STATE_MASK; @@ -33,6 +31,3 @@ index f85ebcf..00feabf 100644 if (state < LTSSM_PCIE_L0) return 0; --- -1.7.9.5 - |