layerscape: add 64b/32b target for ls1012ardb device

The QorIQ LS1012A processor, optimized for battery-backed or
USB-powered, integrates a single ARM Cortex-A53 core with a hardware
packet forwarding engine and high-speed interfaces to deliver
line-rate networking performance.
QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
development platform, with a complete debugging environment.
The LS1012ARDB board supports the QorIQ LS1012A processor and is
optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.

LEDE/OPENWRT will auto strip executable program file while make. So we
need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network
fiemware be destroyed, then run make to build ls1012ardb firmware.

The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message.
This issue have noticed the IP owner for investigate, hope he can solve it
earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default
firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4"
bootargs.

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>

1 files changed, 49 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-4.4/8114-drivers-PCIE-enable-for-Linux.patch b/target/linux/layerscape/patches-4.4/8114-drivers-PCIE-enable-for-Linux.patch
new file mode 100644
index 0000000000..61c85a1f3e
--- /dev/null
+++ b/target/linux/layerscape/patches-4.4/8114-drivers-PCIE-enable-for-Linux.patch
@@ -0,0 +1,49 @@
+From cfe7a6abd3d7e9ffeed8230847bbe2f680757305 Mon Sep 17 00:00:00 2001
+From: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
+Date: Sun, 24 Apr 2016 23:43:19 +0530
+Subject: [PATCH 114/123] drivers: PCIE enable for Linux
+
+[This patch from sdk release, just context adjustment]
+Add support for PCIE for LS1012A in kernel
+
+Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
+Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
+Integrated-by: Jiang Yutang <yutang.jiang@nxp.com>
+---
+ drivers/irqchip/irq-ls-scfg-msi.c |    1 +
+ drivers/pci/host/pci-layerscape.c |    7 +++++++
+ 2 files changed, 8 insertions(+)
+
+--- a/drivers/irqchip/irq-ls-scfg-msi.c
++++ b/drivers/irqchip/irq-ls-scfg-msi.c
+@@ -219,6 +219,7 @@ static int ls_scfg_msi_remove(struct pla
+ }
+ 
+ static const struct of_device_id ls_scfg_msi_id[] = {
++	{ .compatible = "fsl,ls1012a-msi", },
+ 	{ .compatible = "fsl,1s1021a-msi", },
+ 	{ .compatible = "fsl,1s1043a-msi", },
+ 	{},
+--- a/drivers/pci/host/pci-layerscape.c
++++ b/drivers/pci/host/pci-layerscape.c
+@@ -192,6 +192,12 @@ static struct ls_pcie_drvdata ls1021_drv
+ 	.ops = &ls1021_pcie_host_ops,
+ };
+ 
++static struct ls_pcie_drvdata ls1012_drvdata = {
++	.lut_offset = 0xC0000,
++	.ltssm_shift = 24,
++	.ops = &ls_pcie_host_ops,
++};
++
+ static struct ls_pcie_drvdata ls1043_drvdata = {
+ 	.lut_offset = 0x10000,
+ 	.ltssm_shift = 24,
+@@ -205,6 +211,7 @@ static struct ls_pcie_drvdata ls2080_drv
+ };
+ 
+ static const struct of_device_id ls_pcie_of_match[] = {
++	{ .compatible = "fsl,ls1012a-pcie", .data = &ls1012_drvdata },
+ 	{ .compatible = "fsl,ls1021a-pcie", .data = &ls1021_drvdata },
+ 	{ .compatible = "fsl,ls1043a-pcie", .data = &ls1043_drvdata },
+ 	{ .compatible = "fsl,ls2080a-pcie", .data = &ls2080_drvdata },