diff options
author | Yutang Jiang <yutang.jiang@nxp.com> | 2016-12-24 01:11:32 +0800 |
---|---|---|
committer | Jo-Philipp Wich <jo@mein.io> | 2017-01-03 15:19:15 +0100 |
commit | 1866368a8ab8cacf73aa47f67138040d5620439d (patch) | |
tree | 2b0dd1ba578016957856f59bf4b2edc54d6a46c5 /target/linux/layerscape/patches-4.4/7188-staging-fsl-mc-properly-set-hwirq-in-msi-set_desc.patch | |
parent | c6d3a62919a7f993be625391d8593c84423aa021 (diff) | |
download | upstream-1866368a8ab8cacf73aa47f67138040d5620439d.tar.gz upstream-1866368a8ab8cacf73aa47f67138040d5620439d.tar.bz2 upstream-1866368a8ab8cacf73aa47f67138040d5620439d.zip |
layerscape: add ls1088ardb device support
LS1088A is an ARMv8 implementation combining eight ARM A53 processor
cores. The LS1088ARDB is an evaluatoin platform that supports the
LS1088A family SoCs.
Features summary:
- Eight 64-bit ARM v8 Cortex-A53 CPUs
- Data path acceleration architecture 2.0 (DPAA2)
- Ethernet interfaces
- QUADSPI flash, 3 PCIe, 2 USB, 1 SD, 2 DUARTs etc
Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-4.4/7188-staging-fsl-mc-properly-set-hwirq-in-msi-set_desc.patch')
-rw-r--r-- | target/linux/layerscape/patches-4.4/7188-staging-fsl-mc-properly-set-hwirq-in-msi-set_desc.patch | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-4.4/7188-staging-fsl-mc-properly-set-hwirq-in-msi-set_desc.patch b/target/linux/layerscape/patches-4.4/7188-staging-fsl-mc-properly-set-hwirq-in-msi-set_desc.patch new file mode 100644 index 0000000000..34aadad782 --- /dev/null +++ b/target/linux/layerscape/patches-4.4/7188-staging-fsl-mc-properly-set-hwirq-in-msi-set_desc.patch @@ -0,0 +1,48 @@ +From f5f9462cb947922817225b69240740e637de0149 Mon Sep 17 00:00:00 2001 +From: Stuart Yoder <stuart.yoder@nxp.com> +Date: Wed, 22 Jun 2016 16:40:51 -0500 +Subject: [PATCH 188/226] staging: fsl-mc: properly set hwirq in msi set_desc + +For an MSI domain the hwirq is an arbitrary but unique +id to identify an interrupt. Previously the hwirq was set to +the MSI index of the interrupt, but that only works if there is +one DPRC. Additional DPRCs require an expanded namespace. Use +both the ICID (which is unique per DPRC) and the MSI index to +compose a hwirq value. + +Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + drivers/staging/fsl-mc/bus/mc-msi.c | 17 ++++++++++++++++- + 1 file changed, 16 insertions(+), 1 deletion(-) + +--- a/drivers/staging/fsl-mc/bus/mc-msi.c ++++ b/drivers/staging/fsl-mc/bus/mc-msi.c +@@ -20,11 +20,26 @@ + #include "../include/mc-sys.h" + #include "dprc-cmd.h" + ++/* ++ * Generate a unique ID identifying the interrupt (only used within the MSI ++ * irqdomain. Combine the icid with the interrupt index. ++ */ ++static irq_hw_number_t fsl_mc_domain_calc_hwirq(struct fsl_mc_device *dev, ++ struct msi_desc *desc) ++{ ++ /* ++ * Make the base hwirq value for ICID*10000 so it is readable ++ * as a decimal value in /proc/interrupts. ++ */ ++ return (irq_hw_number_t)(desc->fsl_mc.msi_index + (dev->icid * 10000)); ++} ++ + static void fsl_mc_msi_set_desc(msi_alloc_info_t *arg, + struct msi_desc *desc) + { + arg->desc = desc; +- arg->hwirq = (irq_hw_number_t)desc->fsl_mc.msi_index; ++ arg->hwirq = fsl_mc_domain_calc_hwirq(to_fsl_mc_device(desc->dev), ++ desc); + } + + static void fsl_mc_msi_update_dom_ops(struct msi_domain_info *info) |