layerscape: add ls1088ardb device support

LS1088A is an ARMv8 implementation combining eight ARM A53 processor
cores. The LS1088ARDB is an evaluatoin platform that supports the
LS1088A family SoCs.

Features summary:
- Eight 64-bit ARM v8 Cortex-A53 CPUs
- Data path acceleration architecture 2.0 (DPAA2)
- Ethernet interfaces
- QUADSPI flash, 3 PCIe, 2 USB, 1 SD, 2 DUARTs etc

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>

1 files changed, 123 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-4.4/7167-staging-fsl-mc-update-dpmcp-binary-interface-to-v3.0.patch b/target/linux/layerscape/patches-4.4/7167-staging-fsl-mc-update-dpmcp-binary-interface-to-v3.0.patch
new file mode 100644
index 0000000000..b759606140
--- /dev/null
+++ b/target/linux/layerscape/patches-4.4/7167-staging-fsl-mc-update-dpmcp-binary-interface-to-v3.0.patch
@@ -0,0 +1,123 @@
+From fa245614c92ffbdaec6a56552032432b5343b1dc Mon Sep 17 00:00:00 2001
+From: Stuart Yoder <stuart.yoder@nxp.com>
+Date: Mon, 11 Apr 2016 11:48:48 -0500
+Subject: [PATCH 167/226] staging: fsl-mc: update dpmcp binary interface to
+ v3.0
+
+Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
+Acked-by: German Rivera <german.rivera@nxp.com>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ drivers/staging/fsl-mc/bus/dpmcp-cmd.h |    5 ++---
+ drivers/staging/fsl-mc/bus/dpmcp.c     |   35 ++------------------------------
+ drivers/staging/fsl-mc/bus/dpmcp.h     |   10 ++-------
+ 3 files changed, 6 insertions(+), 44 deletions(-)
+
+--- a/drivers/staging/fsl-mc/bus/dpmcp-cmd.h
++++ b/drivers/staging/fsl-mc/bus/dpmcp-cmd.h
+@@ -33,8 +33,8 @@
+ #define _FSL_DPMCP_CMD_H
+ 
+ /* DPMCP Version */
+-#define DPMCP_VER_MAJOR				2
+-#define DPMCP_VER_MINOR				1
++#define DPMCP_VER_MAJOR				3
++#define DPMCP_VER_MINOR				0
+ 
+ /* Command IDs */
+ #define DPMCP_CMDID_CLOSE				0x800
+@@ -52,6 +52,5 @@
+ #define DPMCP_CMDID_SET_IRQ_MASK			0x014
+ #define DPMCP_CMDID_GET_IRQ_MASK			0x015
+ #define DPMCP_CMDID_GET_IRQ_STATUS			0x016
+-#define DPMCP_CMDID_CLEAR_IRQ_STATUS			0x017
+ 
+ #endif /* _FSL_DPMCP_CMD_H */
+--- a/drivers/staging/fsl-mc/bus/dpmcp.c
++++ b/drivers/staging/fsl-mc/bus/dpmcp.c
+@@ -213,7 +213,7 @@ int dpmcp_set_irq(struct fsl_mc_io *mc_i
+ 	cmd.params[0] |= mc_enc(0, 8, irq_index);
+ 	cmd.params[0] |= mc_enc(32, 32, irq_cfg->val);
+ 	cmd.params[1] |= mc_enc(0, 64, irq_cfg->paddr);
+-	cmd.params[2] |= mc_enc(0, 32, irq_cfg->user_irq_id);
++	cmd.params[2] |= mc_enc(0, 32, irq_cfg->irq_num);
+ 
+ 	/* send command to mc*/
+ 	return mc_send_command(mc_io, &cmd);
+@@ -254,7 +254,7 @@ int dpmcp_get_irq(struct fsl_mc_io *mc_i
+ 	/* retrieve response parameters */
+ 	irq_cfg->val = (u32)mc_dec(cmd.params[0], 0, 32);
+ 	irq_cfg->paddr = (u64)mc_dec(cmd.params[1], 0, 64);
+-	irq_cfg->user_irq_id = (int)mc_dec(cmd.params[2], 0, 32);
++	irq_cfg->irq_num = (int)mc_dec(cmd.params[2], 0, 32);
+ 	*type = (int)mc_dec(cmd.params[2], 32, 32);
+ 	return 0;
+ }
+@@ -435,37 +435,6 @@ int dpmcp_get_irq_status(struct fsl_mc_i
+ }
+ 
+ /**
+- * dpmcp_clear_irq_status() - Clear a pending interrupt's status
+- *
+- * @mc_io:	Pointer to MC portal's I/O object
+- * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+- * @token:	Token of DPMCP object
+- * @irq_index:	The interrupt index to configure
+- * @status:	Bits to clear (W1C) - one bit per cause:
+- *					0 = don't change
+- *					1 = clear status bit
+- *
+- * Return:	'0' on Success; Error code otherwise.
+- */
+-int dpmcp_clear_irq_status(struct fsl_mc_io *mc_io,
+-			   u32 cmd_flags,
+-			   u16 token,
+-			   u8 irq_index,
+-			   u32 status)
+-{
+-	struct mc_command cmd = { 0 };
+-
+-	/* prepare command */
+-	cmd.header = mc_encode_cmd_header(DPMCP_CMDID_CLEAR_IRQ_STATUS,
+-					  cmd_flags, token);
+-	cmd.params[0] |= mc_enc(0, 32, status);
+-	cmd.params[0] |= mc_enc(32, 8, irq_index);
+-
+-	/* send command to mc*/
+-	return mc_send_command(mc_io, &cmd);
+-}
+-
+-/**
+  * dpmcp_get_attributes - Retrieve DPMCP attributes.
+  *
+  * @mc_io:	Pointer to MC portal's I/O object
+--- a/drivers/staging/fsl-mc/bus/dpmcp.h
++++ b/drivers/staging/fsl-mc/bus/dpmcp.h
+@@ -82,12 +82,12 @@ int dpmcp_reset(struct fsl_mc_io *mc_io,
+  * struct dpmcp_irq_cfg - IRQ configuration
+  * @paddr:	Address that must be written to signal a message-based interrupt
+  * @val:	Value to write into irq_addr address
+- * @user_irq_id: A user defined number associated with this IRQ
++ * @irq_num: A user defined number associated with this IRQ
+  */
+ struct dpmcp_irq_cfg {
+ 	     uint64_t		paddr;
+ 	     uint32_t		val;
+-	     int		user_irq_id;
++	     int		irq_num;
+ };
+ 
+ int dpmcp_set_irq(struct fsl_mc_io	*mc_io,
+@@ -133,12 +133,6 @@ int dpmcp_get_irq_status(struct fsl_mc_i
+ 			uint8_t			irq_index,
+ 			uint32_t		*status);
+ 
+-int dpmcp_clear_irq_status(struct fsl_mc_io	*mc_io,
+-			   uint32_t		cmd_flags,
+-			   uint16_t		token,
+-			  uint8_t		irq_index,
+-			  uint32_t		status);
+-
+ /**
+  * struct dpmcp_attr - Structure representing DPMCP attributes
+  * @id:		DPMCP object ID