diff options
author | Yutang Jiang <yutang.jiang@nxp.com> | 2016-12-24 01:11:32 +0800 |
---|---|---|
committer | Jo-Philipp Wich <jo@mein.io> | 2017-01-03 15:19:15 +0100 |
commit | 1866368a8ab8cacf73aa47f67138040d5620439d (patch) | |
tree | 2b0dd1ba578016957856f59bf4b2edc54d6a46c5 /target/linux/layerscape/patches-4.4/7145-staging-fsl-mc-Added-generic-MSI-support-for-FSL-MC-.patch | |
parent | c6d3a62919a7f993be625391d8593c84423aa021 (diff) | |
download | upstream-1866368a8ab8cacf73aa47f67138040d5620439d.tar.gz upstream-1866368a8ab8cacf73aa47f67138040d5620439d.tar.bz2 upstream-1866368a8ab8cacf73aa47f67138040d5620439d.zip |
layerscape: add ls1088ardb device support
LS1088A is an ARMv8 implementation combining eight ARM A53 processor
cores. The LS1088ARDB is an evaluatoin platform that supports the
LS1088A family SoCs.
Features summary:
- Eight 64-bit ARM v8 Cortex-A53 CPUs
- Data path acceleration architecture 2.0 (DPAA2)
- Ethernet interfaces
- QUADSPI flash, 3 PCIe, 2 USB, 1 SD, 2 DUARTs etc
Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>
Diffstat (limited to 'target/linux/layerscape/patches-4.4/7145-staging-fsl-mc-Added-generic-MSI-support-for-FSL-MC-.patch')
-rw-r--r-- | target/linux/layerscape/patches-4.4/7145-staging-fsl-mc-Added-generic-MSI-support-for-FSL-MC-.patch | 400 |
1 files changed, 400 insertions, 0 deletions
diff --git a/target/linux/layerscape/patches-4.4/7145-staging-fsl-mc-Added-generic-MSI-support-for-FSL-MC-.patch b/target/linux/layerscape/patches-4.4/7145-staging-fsl-mc-Added-generic-MSI-support-for-FSL-MC-.patch new file mode 100644 index 0000000000..1f3a9f0506 --- /dev/null +++ b/target/linux/layerscape/patches-4.4/7145-staging-fsl-mc-Added-generic-MSI-support-for-FSL-MC-.patch @@ -0,0 +1,400 @@ +From 8ebb892cd56d14e72580ab36c3b5eb2d4603a7fe Mon Sep 17 00:00:00 2001 +From: "J. German Rivera" <German.Rivera@freescale.com> +Date: Wed, 6 Jan 2016 16:03:21 -0600 +Subject: [PATCH 145/226] staging: fsl-mc: Added generic MSI support for + FSL-MC devices + +Created an MSI domain for the fsl-mc bus-- including functions +to create a domain, find a domain, alloc/free domain irqs, and +bus specific overrides for domain and irq_chip ops. + +Signed-off-by: J. German Rivera <German.Rivera@freescale.com> +Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> +--- + drivers/staging/fsl-mc/bus/Kconfig | 1 + + drivers/staging/fsl-mc/bus/Makefile | 1 + + drivers/staging/fsl-mc/bus/mc-msi.c | 276 +++++++++++++++++++++++++++ + drivers/staging/fsl-mc/include/dprc.h | 2 +- + drivers/staging/fsl-mc/include/mc-private.h | 17 ++ + drivers/staging/fsl-mc/include/mc.h | 17 ++ + 6 files changed, 313 insertions(+), 1 deletion(-) + create mode 100644 drivers/staging/fsl-mc/bus/mc-msi.c + +--- a/drivers/staging/fsl-mc/bus/Kconfig ++++ b/drivers/staging/fsl-mc/bus/Kconfig +@@ -9,6 +9,7 @@ + config FSL_MC_BUS + tristate "Freescale Management Complex (MC) bus driver" + depends on OF && ARM64 ++ select GENERIC_MSI_IRQ_DOMAIN + help + Driver to enable the bus infrastructure for the Freescale + QorIQ Management Complex (fsl-mc). The fsl-mc is a hardware +--- a/drivers/staging/fsl-mc/bus/Makefile ++++ b/drivers/staging/fsl-mc/bus/Makefile +@@ -13,5 +13,6 @@ mc-bus-driver-objs := mc-bus.o \ + dpmng.o \ + dprc-driver.o \ + mc-allocator.o \ ++ mc-msi.o \ + dpmcp.o \ + dpbp.o +--- /dev/null ++++ b/drivers/staging/fsl-mc/bus/mc-msi.c +@@ -0,0 +1,276 @@ ++/* ++ * Freescale Management Complex (MC) bus driver MSI support ++ * ++ * Copyright (C) 2015 Freescale Semiconductor, Inc. ++ * Author: German Rivera <German.Rivera@freescale.com> ++ * ++ * This file is licensed under the terms of the GNU General Public ++ * License version 2. This program is licensed "as is" without any ++ * warranty of any kind, whether express or implied. ++ */ ++ ++#include "../include/mc-private.h" ++#include <linux/of_device.h> ++#include <linux/of_address.h> ++#include <linux/irqchip/arm-gic-v3.h> ++#include <linux/of_irq.h> ++#include <linux/irq.h> ++#include <linux/irqdomain.h> ++#include <linux/msi.h> ++#include "../include/mc-sys.h" ++#include "dprc-cmd.h" ++ ++static void fsl_mc_msi_set_desc(msi_alloc_info_t *arg, ++ struct msi_desc *desc) ++{ ++ arg->desc = desc; ++ arg->hwirq = (irq_hw_number_t)desc->fsl_mc.msi_index; ++} ++ ++static void fsl_mc_msi_update_dom_ops(struct msi_domain_info *info) ++{ ++ struct msi_domain_ops *ops = info->ops; ++ ++ if (WARN_ON(!ops)) ++ return; ++ ++ /* ++ * set_desc should not be set by the caller ++ */ ++ if (WARN_ON(ops->set_desc)) ++ return; ++ ++ ops->set_desc = fsl_mc_msi_set_desc; ++} ++ ++static void __fsl_mc_msi_write_msg(struct fsl_mc_device *mc_bus_dev, ++ struct fsl_mc_device_irq *mc_dev_irq) ++{ ++ int error; ++ struct fsl_mc_device *owner_mc_dev = mc_dev_irq->mc_dev; ++ struct msi_desc *msi_desc = mc_dev_irq->msi_desc; ++ struct dprc_irq_cfg irq_cfg; ++ ++ /* ++ * msi_desc->msg.address is 0x0 when this function is invoked in ++ * the free_irq() code path. In this case, for the MC, we don't ++ * really need to "unprogram" the MSI, so we just return. ++ */ ++ if (msi_desc->msg.address_lo == 0x0 && msi_desc->msg.address_hi == 0x0) ++ return; ++ ++ if (WARN_ON(!owner_mc_dev)) ++ return; ++ ++ irq_cfg.paddr = ((u64)msi_desc->msg.address_hi << 32) | ++ msi_desc->msg.address_lo; ++ irq_cfg.val = msi_desc->msg.data; ++ irq_cfg.user_irq_id = msi_desc->irq; ++ ++ if (owner_mc_dev == mc_bus_dev) { ++ /* ++ * IRQ is for the mc_bus_dev's DPRC itself ++ */ ++ error = dprc_set_irq(mc_bus_dev->mc_io, ++ MC_CMD_FLAG_INTR_DIS | MC_CMD_FLAG_PRI, ++ mc_bus_dev->mc_handle, ++ mc_dev_irq->dev_irq_index, ++ &irq_cfg); ++ if (error < 0) { ++ dev_err(&owner_mc_dev->dev, ++ "dprc_set_irq() failed: %d\n", error); ++ } ++ } else { ++ /* ++ * IRQ is for for a child device of mc_bus_dev ++ */ ++ error = dprc_set_obj_irq(mc_bus_dev->mc_io, ++ MC_CMD_FLAG_INTR_DIS | MC_CMD_FLAG_PRI, ++ mc_bus_dev->mc_handle, ++ owner_mc_dev->obj_desc.type, ++ owner_mc_dev->obj_desc.id, ++ mc_dev_irq->dev_irq_index, ++ &irq_cfg); ++ if (error < 0) { ++ dev_err(&owner_mc_dev->dev, ++ "dprc_obj_set_irq() failed: %d\n", error); ++ } ++ } ++} ++ ++/* ++ * NOTE: This function is invoked with interrupts disabled ++ */ ++static void fsl_mc_msi_write_msg(struct irq_data *irq_data, ++ struct msi_msg *msg) ++{ ++ struct msi_desc *msi_desc = irq_data_get_msi_desc(irq_data); ++ struct fsl_mc_device *mc_bus_dev = to_fsl_mc_device(msi_desc->dev); ++ struct fsl_mc_bus *mc_bus = to_fsl_mc_bus(mc_bus_dev); ++ struct fsl_mc_device_irq *mc_dev_irq = ++ &mc_bus->irq_resources[msi_desc->fsl_mc.msi_index]; ++ ++ WARN_ON(mc_dev_irq->msi_desc != msi_desc); ++ msi_desc->msg = *msg; ++ ++ /* ++ * Program the MSI (paddr, value) pair in the device: ++ */ ++ __fsl_mc_msi_write_msg(mc_bus_dev, mc_dev_irq); ++} ++ ++static void fsl_mc_msi_update_chip_ops(struct msi_domain_info *info) ++{ ++ struct irq_chip *chip = info->chip; ++ ++ if (WARN_ON((!chip))) ++ return; ++ ++ /* ++ * irq_write_msi_msg should not be set by the caller ++ */ ++ if (WARN_ON(chip->irq_write_msi_msg)) ++ return; ++ ++ chip->irq_write_msi_msg = fsl_mc_msi_write_msg; ++} ++ ++/** ++ * fsl_mc_msi_create_irq_domain - Create a fsl-mc MSI interrupt domain ++ * @np: Optional device-tree node of the interrupt controller ++ * @info: MSI domain info ++ * @parent: Parent irq domain ++ * ++ * Updates the domain and chip ops and creates a fsl-mc MSI ++ * interrupt domain. ++ * ++ * Returns: ++ * A domain pointer or NULL in case of failure. ++ */ ++struct irq_domain *fsl_mc_msi_create_irq_domain(struct fwnode_handle *fwnode, ++ struct msi_domain_info *info, ++ struct irq_domain *parent) ++{ ++ struct irq_domain *domain; ++ ++ if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS) ++ fsl_mc_msi_update_dom_ops(info); ++ if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS) ++ fsl_mc_msi_update_chip_ops(info); ++ ++ domain = msi_create_irq_domain(fwnode, info, parent); ++ if (domain) ++ domain->bus_token = DOMAIN_BUS_FSL_MC_MSI; ++ ++ return domain; ++} ++ ++int fsl_mc_find_msi_domain(struct device *mc_platform_dev, ++ struct irq_domain **mc_msi_domain) ++{ ++ struct irq_domain *msi_domain; ++ struct device_node *mc_of_node = mc_platform_dev->of_node; ++ ++ msi_domain = of_msi_get_domain(mc_platform_dev, mc_of_node, ++ DOMAIN_BUS_FSL_MC_MSI); ++ if (!msi_domain) { ++ pr_err("Unable to find fsl-mc MSI domain for %s\n", ++ mc_of_node->full_name); ++ ++ return -ENOENT; ++ } ++ ++ *mc_msi_domain = msi_domain; ++ return 0; ++} ++ ++static void fsl_mc_msi_free_descs(struct device *dev) ++{ ++ struct msi_desc *desc, *tmp; ++ ++ list_for_each_entry_safe(desc, tmp, dev_to_msi_list(dev), list) { ++ list_del(&desc->list); ++ free_msi_entry(desc); ++ } ++} ++ ++static int fsl_mc_msi_alloc_descs(struct device *dev, unsigned int irq_count) ++ ++{ ++ unsigned int i; ++ int error; ++ struct msi_desc *msi_desc; ++ ++ for (i = 0; i < irq_count; i++) { ++ msi_desc = alloc_msi_entry(dev); ++ if (!msi_desc) { ++ dev_err(dev, "Failed to allocate msi entry\n"); ++ error = -ENOMEM; ++ goto cleanup_msi_descs; ++ } ++ ++ msi_desc->fsl_mc.msi_index = i; ++ msi_desc->nvec_used = 1; ++ INIT_LIST_HEAD(&msi_desc->list); ++ list_add_tail(&msi_desc->list, dev_to_msi_list(dev)); ++ } ++ ++ return 0; ++ ++cleanup_msi_descs: ++ fsl_mc_msi_free_descs(dev); ++ return error; ++} ++ ++int fsl_mc_msi_domain_alloc_irqs(struct device *dev, ++ unsigned int irq_count) ++{ ++ struct irq_domain *msi_domain; ++ int error; ++ ++ if (WARN_ON(!list_empty(dev_to_msi_list(dev)))) ++ return -EINVAL; ++ ++ error = fsl_mc_msi_alloc_descs(dev, irq_count); ++ if (error < 0) ++ return error; ++ ++ msi_domain = dev_get_msi_domain(dev); ++ if (WARN_ON(!msi_domain)) { ++ error = -EINVAL; ++ goto cleanup_msi_descs; ++ } ++ ++ /* ++ * NOTE: Calling this function will trigger the invocation of the ++ * its_fsl_mc_msi_prepare() callback ++ */ ++ error = msi_domain_alloc_irqs(msi_domain, dev, irq_count); ++ ++ if (error) { ++ dev_err(dev, "Failed to allocate IRQs\n"); ++ goto cleanup_msi_descs; ++ } ++ ++ return 0; ++ ++cleanup_msi_descs: ++ fsl_mc_msi_free_descs(dev); ++ return error; ++} ++ ++void fsl_mc_msi_domain_free_irqs(struct device *dev) ++{ ++ struct irq_domain *msi_domain; ++ ++ msi_domain = dev_get_msi_domain(dev); ++ if (WARN_ON(!msi_domain)) ++ return; ++ ++ msi_domain_free_irqs(msi_domain, dev); ++ ++ if (WARN_ON(list_empty(dev_to_msi_list(dev)))) ++ return; ++ ++ fsl_mc_msi_free_descs(dev); ++} +--- a/drivers/staging/fsl-mc/include/dprc.h ++++ b/drivers/staging/fsl-mc/include/dprc.h +@@ -176,7 +176,7 @@ int dprc_reset_container(struct fsl_mc_i + * @user_irq_id: A user defined number associated with this IRQ + */ + struct dprc_irq_cfg { +- u64 paddr; ++ phys_addr_t paddr; + u32 val; + int user_irq_id; + }; +--- a/drivers/staging/fsl-mc/include/mc-private.h ++++ b/drivers/staging/fsl-mc/include/mc-private.h +@@ -26,6 +26,9 @@ + strcmp(_obj_type, "dpmcp") == 0 || \ + strcmp(_obj_type, "dpcon") == 0) + ++struct irq_domain; ++struct msi_domain_info; ++ + /** + * struct fsl_mc - Private data of a "fsl,qoriq-mc" platform device + * @root_mc_bus_dev: MC object device representing the root DPRC +@@ -79,11 +82,13 @@ struct fsl_mc_resource_pool { + * @resource_pools: array of resource pools (one pool per resource type) + * for this MC bus. These resources represent allocatable entities + * from the physical DPRC. ++ * @irq_resources: Pointer to array of IRQ objects for the IRQ pool + * @scan_mutex: Serializes bus scanning + */ + struct fsl_mc_bus { + struct fsl_mc_device mc_dev; + struct fsl_mc_resource_pool resource_pools[FSL_MC_NUM_POOL_TYPES]; ++ struct fsl_mc_device_irq *irq_resources; + struct mutex scan_mutex; /* serializes bus scanning */ + }; + +@@ -116,4 +121,16 @@ int __must_check fsl_mc_resource_allocat + + void fsl_mc_resource_free(struct fsl_mc_resource *resource); + ++struct irq_domain *fsl_mc_msi_create_irq_domain(struct fwnode_handle *fwnode, ++ struct msi_domain_info *info, ++ struct irq_domain *parent); ++ ++int fsl_mc_find_msi_domain(struct device *mc_platform_dev, ++ struct irq_domain **mc_msi_domain); ++ ++int fsl_mc_msi_domain_alloc_irqs(struct device *dev, ++ unsigned int irq_count); ++ ++void fsl_mc_msi_domain_free_irqs(struct device *dev); ++ + #endif /* _FSL_MC_PRIVATE_H_ */ +--- a/drivers/staging/fsl-mc/include/mc.h ++++ b/drivers/staging/fsl-mc/include/mc.h +@@ -104,6 +104,23 @@ struct fsl_mc_resource { + }; + + /** ++ * struct fsl_mc_device_irq - MC object device message-based interrupt ++ * @msi_desc: pointer to MSI descriptor allocated by fsl_mc_msi_alloc_descs() ++ * @mc_dev: MC object device that owns this interrupt ++ * @dev_irq_index: device-relative IRQ index ++ * @resource: MC generic resource associated with the interrupt ++ */ ++struct fsl_mc_device_irq { ++ struct msi_desc *msi_desc; ++ struct fsl_mc_device *mc_dev; ++ u8 dev_irq_index; ++ struct fsl_mc_resource resource; ++}; ++ ++#define to_fsl_mc_irq(_mc_resource) \ ++ container_of(_mc_resource, struct fsl_mc_device_irq, resource) ++ ++/** + * Bit masks for a MC object device (struct fsl_mc_device) flags + */ + #define FSL_MC_IS_DPRC 0x0001 |