layerscape: add 64b/32b target for ls1012ardb device

The QorIQ LS1012A processor, optimized for battery-backed or
USB-powered, integrates a single ARM Cortex-A53 core with a hardware
packet forwarding engine and high-speed interfaces to deliver
line-rate networking performance.
QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance
development platform, with a complete debugging environment.
The LS1012ARDB board supports the QorIQ LS1012A processor and is
optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.

LEDE/OPENWRT will auto strip executable program file while make. So we
need select CONFIG_NO_STRIP=y while make menuconfig to avoid the ppfe network
fiemware be destroyed, then run make to build ls1012ardb firmware.

The fsl-quadspi flash with jffs2 fs is unstable and arise some failed message.
This issue have noticed the IP owner for investigate, hope he can solve it
earlier. So the ls1012ardb now also provide a xx-firmware.ext4.bin as default
firmware, and the uboot bootcmd will run wrtboot_ext4rfs for "rootfstype=ext4"
bootargs.

Signed-off-by: Yutang Jiang <yutang.jiang@nxp.com>

1 files changed, 72 insertions, 0 deletions

diff --git a/target/linux/layerscape/patches-4.4/1099-mtd-spi-nor-fsl-quadspi-Add-fast-read-mode-support.patch b/target/linux/layerscape/patches-4.4/1099-mtd-spi-nor-fsl-quadspi-Add-fast-read-mode-support.patch
new file mode 100644
index 0000000000..ac99ba9504
--- /dev/null
+++ b/target/linux/layerscape/patches-4.4/1099-mtd-spi-nor-fsl-quadspi-Add-fast-read-mode-support.patch
@@ -0,0 +1,72 @@
+From c501cdf57682265b72a8180c06e4a01dc2978375 Mon Sep 17 00:00:00 2001
+From: Yunhui Cui <B56489@freescale.com>
+Date: Mon, 1 Feb 2016 18:26:23 +0800
+Subject: [PATCH 099/113] mtd:spi-nor:fsl-quadspi:Add fast-read mode support
+
+The qspi driver add generic fast-read mode for different
+flash venders. There are some different board flash work on
+different mode, such fast-read, quad-mode.
+So we have to modify the third entrace parameter of spi_nor_scan().
+
+Signed-off-by: Yunhui Cui <B56489@freescale.com>
+---
+ drivers/mtd/spi-nor/fsl-quadspi.c |   27 +++++++++++++++++++++------
+ 1 file changed, 21 insertions(+), 6 deletions(-)
+
+--- a/drivers/mtd/spi-nor/fsl-quadspi.c
++++ b/drivers/mtd/spi-nor/fsl-quadspi.c
+@@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl
+ 	/* Read */
+ 	lut_base = SEQID_READ * 4;
+ 
+-	qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen),
+-			base + QUADSPI_LUT(lut_base));
+-	qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) |
+-		    LUT1(FSL_READ, PAD4, rxfifo),
+-			base + QUADSPI_LUT(lut_base + 1));
++	if (nor->flash_read == SPI_NOR_FAST) {
++		qspi_writel(q, LUT0(CMD, PAD1, read_op) |
++			    LUT1(ADDR, PAD1, addrlen),
++				base + QUADSPI_LUT(lut_base));
++		qspi_writel(q,  LUT0(DUMMY, PAD1, read_dm) |
++			    LUT1(FSL_READ, PAD1, rxfifo),
++				base + QUADSPI_LUT(lut_base + 1));
++	} else if (nor->flash_read == SPI_NOR_QUAD) {
++		qspi_writel(q, LUT0(CMD, PAD1, read_op) |
++			    LUT1(ADDR, PAD1, addrlen),
++				base + QUADSPI_LUT(lut_base));
++		qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) |
++			    LUT1(FSL_READ, PAD4, rxfifo),
++				base + QUADSPI_LUT(lut_base + 1));
++	}
+ 
+ 	/* Write enable */
+ 	lut_base = SEQID_WREN * 4;
+@@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl
+ {
+ 	switch (cmd) {
+ 	case SPINOR_OP_READ_1_1_4:
++	case SPINOR_OP_READ_FAST:
+ 		return SEQID_READ;
+ 	case SPINOR_OP_WREN:
+ 		return SEQID_WREN;
+@@ -964,6 +975,7 @@ static int fsl_qspi_probe(struct platfor
+ 	struct spi_nor *nor;
+ 	struct mtd_info *mtd;
+ 	int ret, i = 0;
++	enum read_mode mode = SPI_NOR_QUAD;
+ 
+ 	q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL);
+ 	if (!q)
+@@ -1065,7 +1077,10 @@ static int fsl_qspi_probe(struct platfor
+ 		/* set the chip address for READID */
+ 		fsl_qspi_set_base_addr(q, nor);
+ 
+-		ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD);
++		ret = of_property_read_bool(np, "m25p,fast-read");
++		mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD;
++
++		ret = spi_nor_scan(nor, NULL, mode);
+ 		if (ret)
+ 			goto mutex_failed;
+