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authorJohn Crispin <blogic@openwrt.org>2011-07-19 18:06:42 +0000
committerJohn Crispin <blogic@openwrt.org>2011-07-19 18:06:42 +0000
commit12ce54580f874edbab9a0c3e7d0d101a62527954 (patch)
treedda0e90b9292afd243a2f2a6549a20756f27fa47 /target/linux/lantiq
parent251518332b5f3318117d422cb8abac88d1dcb611 (diff)
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fixes pci on lantiq AR9 SoC
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27695 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq')
-rw-r--r--target/linux/lantiq/patches-2.6.39/999-fix_pci.patch18
1 files changed, 18 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-2.6.39/999-fix_pci.patch b/target/linux/lantiq/patches-2.6.39/999-fix_pci.patch
new file mode 100644
index 0000000000..94a3bc7516
--- /dev/null
+++ b/target/linux/lantiq/patches-2.6.39/999-fix_pci.patch
@@ -0,0 +1,18 @@
+--- a/arch/mips/pci/pci-lantiq.c
++++ b/arch/mips/pci/pci-lantiq.c
+@@ -171,8 +171,13 @@
+ u32 temp_buffer;
+
+ /* set clock to 33Mhz */
+- ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0xf00000, LTQ_CGU_IFCCR);
+- ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR);
++ if (ltq_is_ar9()) {
++ ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0x1f00000, LTQ_CGU_IFCCR);
++ ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0xe00000, LTQ_CGU_IFCCR);
++ } else {
++ ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) & ~0xf00000, LTQ_CGU_IFCCR);
++ ltq_cgu_w32(ltq_cgu_r32(LTQ_CGU_IFCCR) | 0x800000, LTQ_CGU_IFCCR);
++ }
+
+ /* external or internal clock ? */
+ if (conf->clock) {