diff options
| author | John Crispin <john@openwrt.org> | 2011-11-11 21:59:01 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2011-11-11 21:59:01 +0000 |
| commit | e1dc73be9075fbdbdf03f0efe3992350273ceca1 (patch) | |
| tree | 83e035145f84afcc9214619dece1536b2e2f098c /target/linux/lantiq/patches/850-falcon-sysctrl-compatibility.patch | |
| parent | 20ff304ed90da0fa22b3d550fe1045d53eed5a0e (diff) | |
| download | upstream-e1dc73be9075fbdbdf03f0efe3992350273ceca1.tar.gz upstream-e1dc73be9075fbdbdf03f0efe3992350273ceca1.tar.bz2 upstream-e1dc73be9075fbdbdf03f0efe3992350273ceca1.zip | |
lantiq: fix breakage introduced in 3.1 bump
SVN-Revision: 28961
Diffstat (limited to 'target/linux/lantiq/patches/850-falcon-sysctrl-compatibility.patch')
| -rw-r--r-- | target/linux/lantiq/patches/850-falcon-sysctrl-compatibility.patch | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches/850-falcon-sysctrl-compatibility.patch b/target/linux/lantiq/patches/850-falcon-sysctrl-compatibility.patch new file mode 100644 index 0000000000..4f54a9b500 --- /dev/null +++ b/target/linux/lantiq/patches/850-falcon-sysctrl-compatibility.patch @@ -0,0 +1,60 @@ +--- a/arch/mips/include/asm/mach-lantiq/falcon/sysctrl.h ++++ b/arch/mips/include/asm/mach-lantiq/falcon/sysctrl.h +@@ -20,23 +20,41 @@ + #ifndef __FALCON_SYSCTRL_H + #define __FALCON_SYSCTRL_H + +-extern void sys1_hw_activate(u32 mask); +-extern void sys1_hw_deactivate(u32 mask); +-extern void sys1_hw_clk_enable(u32 mask); +-extern void sys1_hw_clk_disable(u32 mask); +-extern void sys1_hw_activate_or_reboot(u32 mask); ++#include <falcon/lantiq_soc.h> + +-extern void sys_eth_hw_activate(u32 mask); +-extern void sys_eth_hw_deactivate(u32 mask); +-extern void sys_eth_hw_clk_enable(u32 mask); +-extern void sys_eth_hw_clk_disable(u32 mask); +-extern void sys_eth_hw_activate_or_reboot(u32 mask); ++static inline void sys1_hw_activate(u32 mask) ++{ ltq_sysctl_activate(SYSCTL_SYS1, mask); } ++static inline void sys1_hw_deactivate(u32 mask) ++{ ltq_sysctl_deactivate(SYSCTL_SYS1, mask); } ++static inline void sys1_hw_clk_enable(u32 mask) ++{ ltq_sysctl_clken(SYSCTL_SYS1, mask); } ++static inline void sys1_hw_clk_disable(u32 mask) ++{ ltq_sysctl_clkdis(SYSCTL_SYS1, mask); } ++static inline void sys1_hw_activate_or_reboot(u32 mask) ++{ ltq_sysctl_reboot(SYSCTL_SYS1, mask); } + +-extern void sys_gpe_hw_activate(u32 mask); +-extern void sys_gpe_hw_deactivate(u32 mask); +-extern void sys_gpe_hw_clk_enable(u32 mask); +-extern void sys_gpe_hw_clk_disable(u32 mask); +-extern void sys_gpe_hw_activate_or_reboot(u32 mask); +-extern int sys_gpe_hw_is_activated(u32 mask); ++static inline void sys_eth_hw_activate(u32 mask) ++{ ltq_sysctl_activate(SYSCTL_SYSETH, mask); } ++static inline void sys_eth_hw_deactivate(u32 mask) ++{ ltq_sysctl_deactivate(SYSCTL_SYSETH, mask); } ++static inline void sys_eth_hw_clk_enable(u32 mask) ++{ ltq_sysctl_clken(SYSCTL_SYSETH, mask); } ++static inline void sys_eth_hw_clk_disable(u32 mask) ++{ ltq_sysctl_clkdis(SYSCTL_SYSETH, mask); } ++static inline void sys_eth_hw_activate_or_reboot(u32 mask) ++{ ltq_sysctl_reboot(SYSCTL_SYSETH, mask); } ++ ++static inline void sys_gpe_hw_activate(u32 mask) ++{ ltq_sysctl_activate(SYSCTL_SYSGPE, mask); } ++static inline void sys_gpe_hw_deactivate(u32 mask) ++{ ltq_sysctl_deactivate(SYSCTL_SYSGPE, mask); } ++static inline void sys_gpe_hw_clk_enable(u32 mask) ++{ ltq_sysctl_clken(SYSCTL_SYSGPE, mask); } ++static inline void sys_gpe_hw_clk_disable(u32 mask) ++{ ltq_sysctl_clkdis(SYSCTL_SYSGPE, mask); } ++static inline void sys_gpe_hw_activate_or_reboot(u32 mask) ++{ ltq_sysctl_reboot(SYSCTL_SYSGPE, mask); } ++static inline int sys_gpe_hw_is_activated(u32 mask) ++{ return 1; } + + #endif /* __FALCON_SYSCTRL_H */ |