lantiq: kernel: xway-nand: Move ECC engine setting to new DT binding

When trying to add support for another device with Micron NAND chips,
it was discovered that the default setting in the kernel source does
not work with Micron Chips, since the device trees setting is
overwritten and hard coded by the kernel xway_nand driver. This was
the original reason for this PR.
A kernel patch sets the default ECC mode to soft without overwriting
the device tree settings and the device tree for devices using it
are updated with new parameters because the old ones are deprecated
by torvalds/linux@533af69.
A patch for kernel 5.4 is provided to support the new settings
because kernel 5.4 does not support it.

Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>

1 files changed, 28 insertions, 0 deletions

diff --git a/target/linux/lantiq/patches-5.4/0019-MTD-nand-support-new-dt-bindings.patch b/target/linux/lantiq/patches-5.4/0019-MTD-nand-support-new-dt-bindings.patch
new file mode 100644
index 0000000000..b4aa5b9093
--- /dev/null
+++ b/target/linux/lantiq/patches-5.4/0019-MTD-nand-support-new-dt-bindings.patch
@@ -0,0 +1,28 @@
+The nand-ecc-mode DT binding is depracated but the new bindings are
+not supported by kernel 5.4. Based on a fix in the kernel to not
+overwrite the DT ECC settings, the DT needs to be updated and moves
+to the new DT binding.
+Since the DT is shared between kernel 5.4 and 5.10, this patch is
+an interim solution to allow to use the new DT bindings in kernel 5.4.
+It should be removed when moving away from kernel 5.4.
+--- a/drivers/mtd/nand/raw/nand_base.c
++++ b/drivers/mtd/nand/raw/nand_base.c
+@@ -4851,10 +4851,17 @@ static int of_get_nand_ecc_mode(struct d
+ {
+ 	const char *pm;
+ 	int err, i;
++	struct device_node *eng_np;
+ 
+ 	err = of_property_read_string(np, "nand-ecc-mode", &pm);
+-	if (err < 0)
++	if (err < 0) {
++		if (of_property_read_bool(np, "nand-use-soft-ecc-engine"))
++			return NAND_ECC_SOFT;
++		eng_np = of_parse_phandle(np, "nand-ecc-engine", 0);
++		if (eng_np && (eng_np == np))
++			return NAND_ECC_ON_DIE;
+ 		return err;
++	}
+ 
+ 	for (i = 0; i < ARRAY_SIZE(nand_ecc_modes); i++)
+ 		if (!strcasecmp(pm, nand_ecc_modes[i]))