lantiq: add Linux 5.4 support as testing kernel version

Switch to the mainline Lantiq PCIe PHY driver and update the vr9.dtsi
accordingly.

The Lantiq IRQ SMP support added upstream required changes to the SoC
dtsi as well.

Following changes are made to the Lantiq kernel patches:

  0005-lantiq_etop-pass-struct-device-to-DMA-API-functions.patch
  0006-MIPS-lantiq-pass-struct-device-to-DMA-API-functions.patch
    applied upstream

  0008-MIPS-lantiq-backport-old-timer-code.patch
    access_ok API update because it lost it's type (which was the first)
    parameter in upstream commit 96d4f267e40f95 ("Remove 'type' argument
    from access_ok() function")

  0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch
    merged into 0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch

  0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch
    revert upstream changes required for upstream xrx200 ethernet and
    xrx200 (DSA) switch driver but breaking our driver

  0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch
    required for our driver but dropped upstream, add former upstream
    version

  0028-NET-lantiq-various-etop-fixes.patch
    now has to use the phy_set_max_speed API instead of modifying
    phydev->supported. Also call ltq_dma_enable_irq() in
    ltq_etop_open() based on upstream commit cc973aecf0b054 ("MIPS:
    lantiq: Do not enable IRQs in dma open")

Signed-off-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

1 files changed, 9 insertions, 10 deletions

diff --git a/target/linux/lantiq/patches-5.4/0018-MTD-nand-lots-of-xrx200-fixes.patch b/target/linux/lantiq/patches-5.4/0018-MTD-nand-lots-of-xrx200-fixes.patch
index 4e34580efc..d68466c368 100644
--- a/target/linux/lantiq/patches-5.4/0018-MTD-nand-lots-of-xrx200-fixes.patch
+++ b/target/linux/lantiq/patches-5.4/0018-MTD-nand-lots-of-xrx200-fixes.patch
@@ -10,7 +10,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 
 --- a/drivers/mtd/nand/raw/xway_nand.c
 +++ b/drivers/mtd/nand/raw/xway_nand.c
-@@ -63,6 +63,24 @@
+@@ -61,6 +61,24 @@
  #define NAND_CON_CSMUX		(1 << 1)
  #define NAND_CON_NANDM		1
  
@@ -35,7 +35,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  struct xway_nand_data {
  	struct nand_chip	chip;
  	unsigned long		csflags;
-@@ -94,10 +112,22 @@ static void xway_select_chip(struct mtd_
+@@ -91,10 +109,22 @@ static void xway_select_chip(struct nand
  	case -1:
  		ltq_ebu_w32_mask(NAND_CON_CE, 0, EBU_NAND_CON);
  		ltq_ebu_w32_mask(NAND_CON_NANDM, 0, EBU_NAND_CON);
@@ -58,11 +58,10 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  		ltq_ebu_w32_mask(0, NAND_CON_NANDM, EBU_NAND_CON);
  		ltq_ebu_w32_mask(0, NAND_CON_CE, EBU_NAND_CON);
  		break;
-@@ -108,6 +138,12 @@ static void xway_select_chip(struct mtd_
- 
- static void xway_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+@@ -107,6 +137,11 @@ static void xway_cmd_ctrl(struct nand_ch
  {
-+
+ 	struct mtd_info *mtd = nand_to_mtd(chip);
+ 
 +	if (req_mask) {
 +		if (cmd != NAND_CMD_STATUS)
 +			ltq_ebu_w32(0, EBU_NAND_WAIT); /* Clear nand ready */
@@ -71,7 +70,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  	if (cmd == NAND_CMD_NONE)
  		return;
  
-@@ -118,6 +154,24 @@ static void xway_cmd_ctrl(struct mtd_inf
+@@ -117,6 +152,24 @@ static void xway_cmd_ctrl(struct nand_ch
  
  	while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
  		;
@@ -95,8 +94,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
 +	}
  }
  
- static int xway_dev_ready(struct mtd_info *mtd)
-@@ -157,6 +211,7 @@ static int xway_nand_probe(struct platfo
+ static int xway_dev_ready(struct nand_chip *chip)
+@@ -156,6 +209,7 @@ static int xway_nand_probe(struct platfo
  	int err;
  	u32 cs;
  	u32 cs_flag = 0;
@@ -104,7 +103,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
  
  	/* Allocate memory for the device structure (and zero it) */
  	data = devm_kzalloc(&pdev->dev, sizeof(struct xway_nand_data),
-@@ -192,6 +247,15 @@ static int xway_nand_probe(struct platfo
+@@ -191,6 +245,15 @@ static int xway_nand_probe(struct platfo
  	if (!err && cs == 1)
  		cs_flag = NAND_CON_IN_CS1 | NAND_CON_OUT_CS1;