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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2017-02-11 15:52:41 +0100 |
|---|---|---|
| committer | Hauke Mehrtens <hauke@hauke-m.de> | 2017-02-11 23:44:13 +0100 |
| commit | 863e79f8d5544a8a884375d7e867f350fddca9b9 (patch) | |
| tree | 6c95efffd7d7db4df17dbfae7d108fdd20b99926 /target/linux/lantiq/patches-4.9/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch | |
| parent | ca9b9969fb3f3853f7c6beb43bd496d90c7efe80 (diff) | |
| download | upstream-863e79f8d5544a8a884375d7e867f350fddca9b9.tar.gz upstream-863e79f8d5544a8a884375d7e867f350fddca9b9.tar.bz2 upstream-863e79f8d5544a8a884375d7e867f350fddca9b9.zip | |
lantiq: add support for kernel 4.9
The following patches were dropped because they are already applied
upstream:
0012-pinctrl-lantiq-fix-up-pinmux.patch
0013-MTD-lantiq-xway-fix-invalid-operator.patch
0014-MTD-lantiq-xway-the-latched-command-should-be-persis.patch
0015-MTD-lantiq-xway-remove-endless-loop.patch
0016-MTD-lantiq-xway-add-missing-write_buf-and-read_buf-t.patch
0017-MTD-xway-fix-nand-locking.patch
0044-pinctrl-lantiq-introduce-new-dedicated-devicetree-bi.patch
0045-pinctrl-lantiq-Fix-GPIO-Setup-of-GPIO-Port3.patch
0046-pinctrl-lantiq-2-pins-have-the-wrong-mux-list.patch
0047-irq-fixes.patch
0047-mtd-plat-nand-pass-of-node.patch
0060-usb-dwc2-Add-support-for-Lantiq-ARX-and-XRX-SoCs.patch
0120-MIPS-lantiq-add-support-for-device-tree-file-from-bo.patch
0121-MIPS-lantiq-make-it-possible-to-build-in-no-device-t.patch
122-MIPS-store-the-appended-dtb-address-in-a-variable.patch
The PHY driver was reduced to the code adding the LED configuration,
the rest is already upstream:
0023-NET-PHY-adds-driver-for-lantiq-PHY11G.patch
The SPI driver was replaced with the version pending for upstream
inclusion:
New driver:
0090-spi-add-transfer_status-callback.patch
0091-spi-lantiq-ssc-add-support-for-Lantiq-SSC-SPI-controller.patch
Old driver:
0100-spi-add-support-for-Lantiq-SPI-controller.patch
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/lantiq/patches-4.9/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch')
| -rw-r--r-- | target/linux/lantiq/patches-4.9/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-4.9/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch b/target/linux/lantiq/patches-4.9/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch new file mode 100644 index 0000000000..e42aaf9c07 --- /dev/null +++ b/target/linux/lantiq/patches-4.9/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch @@ -0,0 +1,30 @@ +--- a/arch/mips/lantiq/xway/sysctrl.c ++++ b/arch/mips/lantiq/xway/sysctrl.c +@@ -442,6 +442,20 @@ static void clkdev_add_clkout(void) + } + } + ++static void set_phy_clock_source(struct device_node *np_cgu) ++{ ++ u32 phy_clk_src, ifcc; ++ ++ if (!np_cgu) ++ return; ++ ++ if (of_property_read_u32(np_cgu, "lantiq,phy-clk-src", &phy_clk_src)) ++ return; ++ ++ ifcc = ltq_cgu_r32(ifccr) & ~(0x1c); ++ ltq_cgu_w32(ifcc | (phy_clk_src << 2), ifccr); ++} ++ + /* bring up all register ranges that we need for basic system control */ + void __init ltq_soc_init(void) + { +@@ -628,4 +642,6 @@ void __init ltq_soc_init(void) + if (of_machine_is_compatible("lantiq,vr9")) + xbar_fpi_burst_disable(); + usb_set_clock(); ++ ++ set_phy_clock_source(np_cgu); + } |