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| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2019-07-08 11:40:25 +0200 |
|---|---|---|
| committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2019-12-22 01:24:23 +0100 |
| commit | b3bdfd5df55b104f3affea116a3c54075ea6549c (patch) | |
| tree | 4585b02c6fcef7c201d635748c7fc688c87fe96f /target/linux/lantiq/patches-4.19/0154-lantiq-pci-bar11mask-fix.patch | |
| parent | 8ea7aa5380aba4301bd1804e326534c28249bb24 (diff) | |
| download | upstream-b3bdfd5df55b104f3affea116a3c54075ea6549c.tar.gz upstream-b3bdfd5df55b104f3affea116a3c54075ea6549c.tar.bz2 upstream-b3bdfd5df55b104f3affea116a3c54075ea6549c.zip | |
lantiq: dts: assign the MDIO pins to the gsw node
Assign the MDIO pins to the switch node instead of using pin hogging
(where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.
This converts amazonse, ar9 and vr9. danube is skipped because the pin
controller doesn't define a pinmux for the MDIO pins (some of the SoC
pads may be hardwired to the MDIO pins instead of being configurable).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Diffstat (limited to 'target/linux/lantiq/patches-4.19/0154-lantiq-pci-bar11mask-fix.patch')
0 files changed, 0 insertions, 0 deletions