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authorHauke Mehrtens <hauke@hauke-m.de>2018-11-25 19:35:16 +0100
committerMathias Kresin <dev@kresin.me>2019-07-04 08:29:13 +0200
commiteee1b34ce688efcb824ea9ce08edfce7ec507599 (patch)
treec26d7c8491852b20a4cb179ad42752624860c896 /target/linux/lantiq/patches-4.19/0027-01-net-phy-intel-xway-add-VR9-version-number.patch
parentbf21b6e44d0dd90846582249cc26230f249e6a63 (diff)
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lantiq: copy target to kernel 4.19
This just copies the files from the kernel 4.14 specific folders into the kernel 4.19 specific folder, no changes are done to the files in this commit. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Diffstat (limited to 'target/linux/lantiq/patches-4.19/0027-01-net-phy-intel-xway-add-VR9-version-number.patch')
-rw-r--r--target/linux/lantiq/patches-4.19/0027-01-net-phy-intel-xway-add-VR9-version-number.patch62
1 files changed, 62 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-4.19/0027-01-net-phy-intel-xway-add-VR9-version-number.patch b/target/linux/lantiq/patches-4.19/0027-01-net-phy-intel-xway-add-VR9-version-number.patch
new file mode 100644
index 0000000000..b02b3fbd2c
--- /dev/null
+++ b/target/linux/lantiq/patches-4.19/0027-01-net-phy-intel-xway-add-VR9-version-number.patch
@@ -0,0 +1,62 @@
+From 5b73d9955fb4b0e3c37f8f6c71910293246c89dc Mon Sep 17 00:00:00 2001
+From: Mathias Kresin <dev@kresin.me>
+Date: Thu, 22 Mar 2018 23:31:38 +0100
+Subject: [PATCH 1/2] net: phy: intel-xway: add VR9 version number
+
+The VR9 phy ids are matching only for the SoC version 1.2. Rename the
+macros and change the names to take this into account.
+
+Signed-off-by: Mathias Kresin <dev@kresin.me>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/phy/intel-xway.c | 16 ++++++++--------
+ 1 file changed, 8 insertions(+), 8 deletions(-)
+
+--- a/drivers/net/phy/intel-xway.c
++++ b/drivers/net/phy/intel-xway.c
+@@ -149,8 +149,8 @@
+ #define PHY_ID_PHY22F_1_4 0xD565A410
+ #define PHY_ID_PHY11G_1_5 0xD565A401
+ #define PHY_ID_PHY22F_1_5 0xD565A411
+-#define PHY_ID_PHY11G_VR9 0xD565A409
+-#define PHY_ID_PHY22F_VR9 0xD565A419
++#define PHY_ID_PHY11G_VR9_1_2 0xD565A409
++#define PHY_ID_PHY22F_VR9_1_2 0xD565A419
+
+ #if IS_ENABLED(CONFIG_OF_MDIO)
+ static int vr9_gphy_of_reg_init(struct phy_device *phydev)
+@@ -366,9 +366,9 @@ static struct phy_driver xway_gphy[] = {
+ .suspend = genphy_suspend,
+ .resume = genphy_resume,
+ }, {
+- .phy_id = PHY_ID_PHY11G_VR9,
++ .phy_id = PHY_ID_PHY11G_VR9_1_2,
+ .phy_id_mask = 0xffffffff,
+- .name = "Intel XWAY PHY11G (xRX integrated)",
++ .name = "Intel XWAY PHY11G (xRX v1.2 integrated)",
+ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = xway_gphy_config_init,
+@@ -380,9 +380,9 @@ static struct phy_driver xway_gphy[] = {
+ .suspend = genphy_suspend,
+ .resume = genphy_resume,
+ }, {
+- .phy_id = PHY_ID_PHY22F_VR9,
++ .phy_id = PHY_ID_PHY22F_VR9_1_2,
+ .phy_id_mask = 0xffffffff,
+- .name = "Intel XWAY PHY22F (xRX integrated)",
++ .name = "Intel XWAY PHY22F (xRX v1.2 integrated)",
+ .features = PHY_BASIC_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = xway_gphy_config_init,
+@@ -404,8 +404,8 @@ static struct mdio_device_id __maybe_unu
+ { PHY_ID_PHY22F_1_4, 0xffffffff },
+ { PHY_ID_PHY11G_1_5, 0xffffffff },
+ { PHY_ID_PHY22F_1_5, 0xffffffff },
+- { PHY_ID_PHY11G_VR9, 0xffffffff },
+- { PHY_ID_PHY22F_VR9, 0xffffffff },
++ { PHY_ID_PHY11G_VR9_1_2, 0xffffffff },
++ { PHY_ID_PHY22F_VR9_1_2, 0xffffffff },
+ { }
+ };
+ MODULE_DEVICE_TABLE(mdio, xway_gphy_tbl);