diff options
| author | John Crispin <john@openwrt.org> | 2012-04-12 12:33:56 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2012-04-12 12:33:56 +0000 |
| commit | e3889bcf7c8ad2eff0eaeb62dbc4c0977a972788 (patch) | |
| tree | c69a83b322c88d9516c9022635a80d5803ac83c3 /target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch | |
| parent | 1b7578845130f5ea6f4096f62bfe0f49a7315d4f (diff) | |
| download | upstream-e3889bcf7c8ad2eff0eaeb62dbc4c0977a972788.tar.gz upstream-e3889bcf7c8ad2eff0eaeb62dbc4c0977a972788.tar.bz2 upstream-e3889bcf7c8ad2eff0eaeb62dbc4c0977a972788.zip | |
update 3.2 patches
sync with lantiq kernel series
SVN-Revision: 31260
Diffstat (limited to 'target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch')
| -rw-r--r-- | target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch b/target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch deleted file mode 100644 index a79f50c4f3..0000000000 --- a/target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 845d2430d74cf6e2326da95b9205258170b30c86 Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Tue, 20 Mar 2012 09:44:27 +0100 -Subject: [PATCH 67/70] MIPS: lantiq: irqs were not cleared properly on boot - ---- - arch/mips/lantiq/irq.c | 10 +++++----- - 1 files changed, 5 insertions(+), 5 deletions(-) - ---- a/arch/mips/lantiq/irq.c -+++ b/arch/mips/lantiq/irq.c -@@ -327,12 +327,12 @@ void __init arch_init_irq(void) - panic("Failed to remap eiu memory\n"); - } - -- /* make sure all irqs are turned off by default */ -- for (i = 0; i < 5; i++) -+ for (i = 0; i < 5; i++) { -+ /* make sure all irqs are turned off by default */ - ltq_icu_w32(0, LTQ_ICU_IM0_IER + (i * LTQ_ICU_OFFSET)); -- -- /* clear all possibly pending interrupts */ -- ltq_icu_w32(~0, LTQ_ICU_IM0_ISR + (i * LTQ_ICU_OFFSET)); -+ /* clear all possibly pending interrupts */ -+ ltq_icu_w32(~0, LTQ_ICU_IM0_ISR + (i * LTQ_ICU_OFFSET)); -+ } - - mips_cpu_irq_init(); - |