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| author | John Crispin <john@openwrt.org> | 2015-05-23 15:25:51 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2015-05-23 15:25:51 +0000 |
| commit | 390924e662b1f95cd568d184f41257f69aba08b9 (patch) | |
| tree | ac21766f232d28b6011f6ea601ed7da874cb6171 /target/linux/lantiq/patches-3.18/0005-MIPS-lantiq-add-reset-controller-api-support.patch | |
| parent | 47eca7a1ca266c9b0746f659cd3f95808ec07ed6 (diff) | |
| download | upstream-390924e662b1f95cd568d184f41257f69aba08b9.tar.gz upstream-390924e662b1f95cd568d184f41257f69aba08b9.tar.bz2 upstream-390924e662b1f95cd568d184f41257f69aba08b9.zip | |
lantiq: Fix PCIe bus when PCI is also enabled.
The PCIe bus seems to require a hack/workaround when PCI is enabled as
well. Unfortunately this is guarded by an CONFIG_IFX_PCI ifdef, which is
only defined in lantiq's BSP code. The config symbol for the upstream
lantiq PCI driver is CONFIG_PCI_LANTIQ.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
SVN-Revision: 45717
Diffstat (limited to 'target/linux/lantiq/patches-3.18/0005-MIPS-lantiq-add-reset-controller-api-support.patch')
0 files changed, 0 insertions, 0 deletions