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author | John Crispin <blogic@openwrt.org> | 2015-03-16 07:39:52 +0000 |
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committer | John Crispin <blogic@openwrt.org> | 2015-03-16 07:39:52 +0000 |
commit | ed1a519c4056a21adde2ca81c1919951329bf9b0 (patch) | |
tree | 99effefe0c09a7f8ef9e0c6f0818c23611a2cd43 /target/linux/lantiq/patches-3.14/0015-MTD-lantiq-xway-remove-endless-loop.patch | |
parent | c59b0d680a93e745d8606dbd69843137e51d12c6 (diff) | |
download | upstream-ed1a519c4056a21adde2ca81c1919951329bf9b0.tar.gz upstream-ed1a519c4056a21adde2ca81c1919951329bf9b0.tar.bz2 upstream-ed1a519c4056a21adde2ca81c1919951329bf9b0.zip |
lantiq: drop 3.14 support
Signed-off-by: John Crispin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44812 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/patches-3.14/0015-MTD-lantiq-xway-remove-endless-loop.patch')
-rw-r--r-- | target/linux/lantiq/patches-3.14/0015-MTD-lantiq-xway-remove-endless-loop.patch | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/target/linux/lantiq/patches-3.14/0015-MTD-lantiq-xway-remove-endless-loop.patch b/target/linux/lantiq/patches-3.14/0015-MTD-lantiq-xway-remove-endless-loop.patch deleted file mode 100644 index 4bd166863b..0000000000 --- a/target/linux/lantiq/patches-3.14/0015-MTD-lantiq-xway-remove-endless-loop.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 76e153079f02d26e3357302d2886a0c8aaaec64d Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Sun, 28 Jul 2013 18:02:06 +0200 -Subject: [PATCH 15/36] MTD: lantiq: xway: remove endless loop - -The reset loop logic could run into a endless loop. Lets fix it as requested. - ---> http://lists.infradead.org/pipermail/linux-mtd/2012-September/044240.html - -Signed-off-by: John Crispin <blogic@openwrt.org> ---- - drivers/mtd/nand/xway_nand.c | 10 ++++++++-- - 1 file changed, 8 insertions(+), 2 deletions(-) - ---- a/drivers/mtd/nand/xway_nand.c -+++ b/drivers/mtd/nand/xway_nand.c -@@ -59,16 +59,22 @@ static u32 xway_latchcmd; - static void xway_reset_chip(struct nand_chip *chip) - { - unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W; -+ unsigned long timeout; - unsigned long flags; - - nandaddr &= ~NAND_WRITE_ADDR; - nandaddr |= NAND_WRITE_CMD; - - /* finish with a reset */ -+ timeout = jiffies + msecs_to_jiffies(20); -+ - spin_lock_irqsave(&ebu_lock, flags); - writeb(NAND_WRITE_CMD_RESET, (void __iomem *) nandaddr); -- while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0) -- ; -+ do { -+ if ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0) -+ break; -+ cond_resched(); -+ } while (!time_after_eq(jiffies, timeout)); - spin_unlock_irqrestore(&ebu_lock, flags); - } - |