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| author | John Crispin <john@openwrt.org> | 2013-09-17 21:46:10 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2013-09-17 21:46:10 +0000 |
| commit | 1878a3d6ab7e4296671eaa827623cc874d1f12c5 (patch) | |
| tree | 895fea96a0462bc19622aed65e9e179d22d61069 /target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch | |
| parent | cd668944ef699762d4269ad71263ffe99c93ea8c (diff) | |
| download | upstream-1878a3d6ab7e4296671eaa827623cc874d1f12c5.tar.gz upstream-1878a3d6ab7e4296671eaa827623cc874d1f12c5.tar.bz2 upstream-1878a3d6ab7e4296671eaa827623cc874d1f12c5.zip | |
lantiq: add v3.10 patches
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 38031
Diffstat (limited to 'target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch')
| -rw-r--r-- | target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch b/target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch new file mode 100644 index 0000000000..726207150f --- /dev/null +++ b/target/linux/lantiq/patches-3.10/0017-MTD-lantiq-xway-remove-endless-loop.patch @@ -0,0 +1,46 @@ +From 43c13af427d6900c7ce0111c53d3a428146b3f50 Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Sun, 28 Jul 2013 18:02:06 +0200 +Subject: [PATCH 17/34] MTD: lantiq: xway: remove endless loop + +The reset loop logic could run into a endless loop. Lets fix it as requested. + +--> http://lists.infradead.org/pipermail/linux-mtd/2012-September/044240.html + +Signed-off-by: John Crispin <blogic@openwrt.org> +--- + drivers/mtd/nand/xway_nand.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/drivers/mtd/nand/xway_nand.c b/drivers/mtd/nand/xway_nand.c +index 7f2bdd1..8d14f1b 100644 +--- a/drivers/mtd/nand/xway_nand.c ++++ b/drivers/mtd/nand/xway_nand.c +@@ -59,16 +59,22 @@ static u32 xway_latchcmd; + static void xway_reset_chip(struct nand_chip *chip) + { + unsigned long nandaddr = (unsigned long) chip->IO_ADDR_W; ++ unsigned long timeout; + unsigned long flags; + + nandaddr &= ~NAND_WRITE_ADDR; + nandaddr |= NAND_WRITE_CMD; + + /* finish with a reset */ ++ timeout = jiffies + msecs_to_jiffies(20); ++ + spin_lock_irqsave(&ebu_lock, flags); + writeb(NAND_WRITE_CMD_RESET, (void __iomem *) nandaddr); +- while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0) +- ; ++ do { ++ if ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0) ++ break; ++ cond_resched(); ++ } while (!time_after_eq(jiffies, timeout)); + spin_unlock_irqrestore(&ebu_lock, flags); + } + +-- +1.7.10.4 + |