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| author | John Crispin <john@openwrt.org> | 2013-09-17 21:46:10 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2013-09-17 21:46:10 +0000 |
| commit | 1878a3d6ab7e4296671eaa827623cc874d1f12c5 (patch) | |
| tree | 895fea96a0462bc19622aed65e9e179d22d61069 /target/linux/lantiq/patches-3.10/0004-MIPS-lantiq-falcon-add-cpu-feature-override.h.patch | |
| parent | cd668944ef699762d4269ad71263ffe99c93ea8c (diff) | |
| download | upstream-1878a3d6ab7e4296671eaa827623cc874d1f12c5.tar.gz upstream-1878a3d6ab7e4296671eaa827623cc874d1f12c5.tar.bz2 upstream-1878a3d6ab7e4296671eaa827623cc874d1f12c5.zip | |
lantiq: add v3.10 patches
Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 38031
Diffstat (limited to 'target/linux/lantiq/patches-3.10/0004-MIPS-lantiq-falcon-add-cpu-feature-override.h.patch')
| -rw-r--r-- | target/linux/lantiq/patches-3.10/0004-MIPS-lantiq-falcon-add-cpu-feature-override.h.patch | 84 |
1 files changed, 84 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.10/0004-MIPS-lantiq-falcon-add-cpu-feature-override.h.patch b/target/linux/lantiq/patches-3.10/0004-MIPS-lantiq-falcon-add-cpu-feature-override.h.patch new file mode 100644 index 0000000000..9e4138a5fe --- /dev/null +++ b/target/linux/lantiq/patches-3.10/0004-MIPS-lantiq-falcon-add-cpu-feature-override.h.patch @@ -0,0 +1,84 @@ +From e451973421b255917496c8ef784f8a5c92bb5548 Mon Sep 17 00:00:00 2001 +From: Thomas Langer <thomas.langer@lantiq.com> +Date: Thu, 8 Aug 2013 11:07:25 +0200 +Subject: [PATCH 04/34] MIPS: lantiq: falcon: add cpu-feature-override.h + +Add cpu-feature-override.h for the GPON SoC + +Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> +Acked-by: John Crispin <blogic@openwrt.org> + +Acked-by: John Crispin <blogic@openwrt.org> +Patchwork: http://patchwork.linux-mips.org/patch/5658/ +--- + .../asm/mach-lantiq/falcon/cpu-feature-overrides.h | 58 ++++++++++++++++++++ + 1 file changed, 58 insertions(+) + create mode 100644 arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h + +diff --git a/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h b/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h +new file mode 100644 +index 0000000..096a100 +--- /dev/null ++++ b/arch/mips/include/asm/mach-lantiq/falcon/cpu-feature-overrides.h +@@ -0,0 +1,58 @@ ++/* ++ * Lantiq FALCON specific CPU feature overrides ++ * ++ * Copyright (C) 2013 Thomas Langer, Lantiq Deutschland ++ * ++ * This file was derived from: include/asm-mips/cpu-features.h ++ * Copyright (C) 2003, 2004 Ralf Baechle ++ * Copyright (C) 2004 Maciej W. Rozycki ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ * ++ */ ++#ifndef __ASM_MACH_FALCON_CPU_FEATURE_OVERRIDES_H ++#define __ASM_MACH_FALCON_CPU_FEATURE_OVERRIDES_H ++ ++#define cpu_has_tlb 1 ++#define cpu_has_4kex 1 ++#define cpu_has_3k_cache 0 ++#define cpu_has_4k_cache 1 ++#define cpu_has_tx39_cache 0 ++#define cpu_has_sb1_cache 0 ++#define cpu_has_fpu 0 ++#define cpu_has_32fpr 0 ++#define cpu_has_counter 1 ++#define cpu_has_watch 1 ++#define cpu_has_divec 1 ++ ++#define cpu_has_prefetch 1 ++#define cpu_has_ejtag 1 ++#define cpu_has_llsc 1 ++ ++#define cpu_has_mips16 1 ++#define cpu_has_mdmx 0 ++#define cpu_has_mips3d 0 ++#define cpu_has_smartmips 0 ++ ++#define cpu_has_mips32r1 1 ++#define cpu_has_mips32r2 1 ++#define cpu_has_mips64r1 0 ++#define cpu_has_mips64r2 0 ++ ++#define cpu_has_dsp 1 ++#define cpu_has_mipsmt 1 ++ ++#define cpu_has_vint 1 ++#define cpu_has_veic 1 ++ ++#define cpu_has_64bits 0 ++#define cpu_has_64bit_zero_reg 0 ++#define cpu_has_64bit_gp_regs 0 ++#define cpu_has_64bit_addresses 0 ++ ++#define cpu_dcache_line_size() 32 ++#define cpu_icache_line_size() 32 ++ ++#endif /* __ASM_MACH_FALCON_CPU_FEATURE_OVERRIDES_H */ +-- +1.7.10.4 + |