diff options
| author | John Crispin <john@openwrt.org> | 2011-10-10 15:13:46 +0000 |
|---|---|---|
| committer | John Crispin <john@openwrt.org> | 2011-10-10 15:13:46 +0000 |
| commit | 0a866293bd9e204978c995cb0545c20f8ab63c7e (patch) | |
| tree | 7d7a9ef25035a4afd4b371b85506fe062bac125a /target/linux/lantiq/patches-3.0/0001-MIPS-lantiq-fix-early-printk.patch | |
| parent | 1359fe4fcf0a6cef3eced837d63c866cc75a52fc (diff) | |
| download | upstream-0a866293bd9e204978c995cb0545c20f8ab63c7e.tar.gz upstream-0a866293bd9e204978c995cb0545c20f8ab63c7e.tar.bz2 upstream-0a866293bd9e204978c995cb0545c20f8ab63c7e.zip | |
* update patches to 3.0
* add basic vr9 support
* backport 3.1 fixes
* backport 3.2 queue (falcon)
SVN-Revision: 28405
Diffstat (limited to 'target/linux/lantiq/patches-3.0/0001-MIPS-lantiq-fix-early-printk.patch')
| -rw-r--r-- | target/linux/lantiq/patches-3.0/0001-MIPS-lantiq-fix-early-printk.patch | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.0/0001-MIPS-lantiq-fix-early-printk.patch b/target/linux/lantiq/patches-3.0/0001-MIPS-lantiq-fix-early-printk.patch new file mode 100644 index 0000000000..2671360f93 --- /dev/null +++ b/target/linux/lantiq/patches-3.0/0001-MIPS-lantiq-fix-early-printk.patch @@ -0,0 +1,67 @@ +From 91f8d0c8fbb9ea70bf78a291e312157177be8ee3 Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Sat, 20 Aug 2011 18:55:13 +0200 +Subject: [PATCH 01/24] MIPS: lantiq: fix early printk + +The code was using a 32bit write operation in the early_printk code. This +resulted in 3 zero bytes also being written to the serial port. Change the +memory access to 8bit. + +Signed-off-by: Thomas Langer <thomas.langer@lantiq.com> +Signed-off-by: John Crispin <blogic@openwrt.org> +Cc: linux-mips@linux-mips.org +--- + .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 4 ++++ + arch/mips/lantiq/early_printk.c | 14 ++++++++------ + 2 files changed, 12 insertions(+), 6 deletions(-) + +diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h +index 8a3c6be..e6d1ca0 100644 +--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h ++++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h +@@ -34,6 +34,10 @@ + #define LTQ_ASC1_BASE_ADDR 0x1E100C00 + #define LTQ_ASC_SIZE 0x400 + ++/* during early_printk no ioremap is possible ++ lets use KSEG1 instead */ ++#define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC1_BASE_ADDR) ++ + /* RCU - reset control unit */ + #define LTQ_RCU_BASE_ADDR 0x1F203000 + #define LTQ_RCU_SIZE 0x1000 +diff --git a/arch/mips/lantiq/early_printk.c b/arch/mips/lantiq/early_printk.c +index 972e05f..5089075 100644 +--- a/arch/mips/lantiq/early_printk.c ++++ b/arch/mips/lantiq/early_printk.c +@@ -12,11 +12,13 @@ + #include <lantiq.h> + #include <lantiq_soc.h> + +-/* no ioremap possible at this early stage, lets use KSEG1 instead */ +-#define LTQ_ASC_BASE KSEG1ADDR(LTQ_ASC1_BASE_ADDR) + #define ASC_BUF 1024 +-#define LTQ_ASC_FSTAT ((u32 *)(LTQ_ASC_BASE + 0x0048)) +-#define LTQ_ASC_TBUF ((u32 *)(LTQ_ASC_BASE + 0x0020)) ++#define LTQ_ASC_FSTAT ((u32 *)(LTQ_EARLY_ASC + 0x0048)) ++#ifdef __BIG_ENDIAN ++#define LTQ_ASC_TBUF ((u32 *)(LTQ_EARLY_ASC + 0x0020 + 3)) ++#else ++#define LTQ_ASC_TBUF ((u32 *)(LTQ_EARLY_ASC + 0x0020)) ++#endif + #define TXMASK 0x3F00 + #define TXOFFSET 8 + +@@ -27,7 +29,7 @@ void prom_putchar(char c) + local_irq_save(flags); + do { } while ((ltq_r32(LTQ_ASC_FSTAT) & TXMASK) >> TXOFFSET); + if (c == '\n') +- ltq_w32('\r', LTQ_ASC_TBUF); +- ltq_w32(c, LTQ_ASC_TBUF); ++ ltq_w8('\r', LTQ_ASC_TBUF); ++ ltq_w8(c, LTQ_ASC_TBUF); + local_irq_restore(flags); + } +-- +1.7.5.4 + |