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author | Mathias Kresin <dev@kresin.me> | 2021-11-13 14:55:13 +0100 |
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committer | Mathias Kresin <dev@kresin.me> | 2021-11-27 21:40:12 +0100 |
commit | a328b6831c0f1e47e4fd4da4e00c0b9cb53cf2e4 (patch) | |
tree | 003835e1580801039a0a1f1be1566956fbf18643 /target/linux/lantiq/image/lzma-loader/src/cache.c | |
parent | 1404ed25b8f4963da148f1da2e561ecde7a34df6 (diff) | |
download | upstream-a328b6831c0f1e47e4fd4da4e00c0b9cb53cf2e4.tar.gz upstream-a328b6831c0f1e47e4fd4da4e00c0b9cb53cf2e4.tar.bz2 upstream-a328b6831c0f1e47e4fd4da4e00c0b9cb53cf2e4.zip |
lantiq: bring back okli loader
Removed due to being unused with 1f7a03a70603, but now required for the
ar7 FRITZ!Box.
Could be used for the ARV7519RW22 as well, for which the image
generation was disabled due to a stock u-boot issue with kernel bigger
than 2 MByte.
The code is combination of the ath79 and ramips okli loader.
Signed-off-by: Mathias Kresin <dev@kresin.me>
Diffstat (limited to 'target/linux/lantiq/image/lzma-loader/src/cache.c')
-rw-r--r-- | target/linux/lantiq/image/lzma-loader/src/cache.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/target/linux/lantiq/image/lzma-loader/src/cache.c b/target/linux/lantiq/image/lzma-loader/src/cache.c new file mode 100644 index 0000000000..28cc848333 --- /dev/null +++ b/target/linux/lantiq/image/lzma-loader/src/cache.c @@ -0,0 +1,43 @@ +/* + * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards + * + * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org> + * + * The cache manipulation routine has been taken from the U-Boot project. + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + */ + +#include "cache.h" +#include "cacheops.h" +#include "config.h" + +#define cache_op(op,addr) \ + __asm__ __volatile__( \ + " .set push \n" \ + " .set noreorder \n" \ + " .set mips3\n\t \n" \ + " cache %0, %1 \n" \ + " .set pop \n" \ + : \ + : "i" (op), "R" (*(unsigned char *)(addr))) + +void flush_cache(unsigned long start_addr, unsigned long size) +{ + unsigned long lsize = CONFIG_CACHELINE_SIZE; + unsigned long addr = start_addr & ~(lsize - 1); + unsigned long aend = (start_addr + size - 1) & ~(lsize - 1); + + while (1) { + cache_op(Hit_Writeback_Inv_D, addr); + cache_op(Hit_Invalidate_I, addr); + if (addr == aend) + break; + addr += lsize; + } +} |