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authorJohn Crispin <john@openwrt.org>2013-01-28 17:42:59 +0000
committerJohn Crispin <john@openwrt.org>2013-01-28 17:42:59 +0000
commit5eb43d4cf8451c965f92d56cf717918098e03321 (patch)
tree373dc9453cc27308335a0493fc10a7e198342def /target/linux/lantiq/image/ARV4518PWR01A.dts
parent509f39a10a4295c85d2a6f63573bb0698a067241 (diff)
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Add support for ARV4518PW R01 and rename R01A.
There are two different versions of SMC7908A-ISP: R01 and R01A. R01 has an internal clock for PCI, meanwhile R01A has an external clock. This fixes: https://dev.openwrt.org/ticket/12884 Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> SVN-Revision: 35352
Diffstat (limited to 'target/linux/lantiq/image/ARV4518PWR01A.dts')
-rw-r--r--target/linux/lantiq/image/ARV4518PWR01A.dts192
1 files changed, 192 insertions, 0 deletions
diff --git a/target/linux/lantiq/image/ARV4518PWR01A.dts b/target/linux/lantiq/image/ARV4518PWR01A.dts
new file mode 100644
index 0000000000..cf960e006c
--- /dev/null
+++ b/target/linux/lantiq/image/ARV4518PWR01A.dts
@@ -0,0 +1,192 @@
+/dts-v1/;
+
+/include/ "danube.dtsi"
+
+/ {
+ model = "ARV4518PWR01A - SMC7908A-ISP, Airties WAV-221";
+
+ chosen {
+ bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
+ };
+
+ memory@0 {
+ reg = <0x0 0x4000000>;
+ };
+
+ sram@1F000000 {
+ vmmc@107000 {
+ status = "okay";
+ gpios = <&gpio 31 0>;
+ };
+ };
+
+ fpi@10000000 {
+ localbus@0 {
+ nor-boot@0 {
+ compatible = "lantiq,nor";
+ bank-width = <2>;
+ reg = <0 0x0 0x2000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x00000 0x10000>; /* 64 KB */
+ read-only;
+ };
+
+ partition@10000 {
+ label = "uboot_env";
+ reg = <0x10000 0x10000>; /* 64 KB */
+ read-only;
+ };
+
+ partition@20000 {
+ label = "linux";
+ reg = <0x20000 0x3d0000>;
+ };
+
+ partition@400000 {
+ label = "boardconfig";
+ reg = <0x3f0000 0x10000>;
+ read-only;
+ };
+ };
+
+ gpiomm: gpiomm@4000000 {
+ compatible = "lantiq,gpio-mm";
+ reg = <1 0x0 0x10 >;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ lantiq,shadow = <0x0>;
+ };
+
+ mac_addr {
+ compatible = "lantiq,eth-mac";
+ reg = <0 0x3f0016 0x6>;
+ mac-increment = <2>;
+ };
+
+ ath5k_eep {
+ compatible = "ath5k,eeprom";
+ reg = <0 0x3f0400 0x800
+ 0 0x3f0016 0x6>;
+ ath,mac-increment = <1>;
+ ath,eep-swap;
+ };
+ };
+
+ gpio: pinmux@E100B10 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ state_default: pinmux {
+ ebu {
+ lantiq,groups = "ebu cs1";
+ lantiq,function = "ebu";
+ };
+ pci_in {
+ lantiq,groups = "req1", "req2";
+ lantiq,function = "pci";
+ lantiq,open-drain = <1>;
+ lantiq,pull = <2>;
+ lantiq,output = <0>;
+ };
+ pci_out {
+ lantiq,groups = "gnt1", "gnt2";
+ lantiq,function = "pci";
+ lantiq,pull = <0>;
+ lantiq,output = <1>;
+ };
+ };
+ };
+
+ etop@E180000 {
+ phy-mode = "rmii";
+ };
+
+ ifxhcd@E101000 {
+ status = "okay";
+ gpios = <&gpio 14 0>;
+ };
+
+ pci@E105400 {
+ status = "okay";
+ lantiq,external-clock;
+ gpio-reset = <&gpio 21 0>;
+ req-mask = <0xf>;
+ };
+
+ };
+
+/*
+#define ARV4518PW_SWITCH_RESET 13
+*/
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+
+ rfkill {
+ label = "rfkill";
+ gpios = <&gpio 28 1>;
+ linux,code = <0xf7>;
+ };
+ reset {
+ label = "reset";
+ gpios = <&gpio 30 1>;
+ linux,code = <0x198>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+ power {
+ label = "power";
+ gpios = <&gpio 3 0>;
+ };
+ dsl {
+ label = "dsl";
+ gpios = <&gpio 4 1>;
+ };
+ online {
+ label = "online";
+ gpios = <&gpio 5 1>;
+ };
+ wifi {
+ label = "wifi";
+ gpios = <&gpio 6 1>;
+ };
+ wps {
+ label = "wps";
+ gpios = <&gpio 7 1>;
+ };
+ dsl2 {
+ label = "dsl2";
+ gpios = <&gpio 8 1>;
+ };
+ usb {
+ label = "usb";
+ gpios = <&gpio 19 1>;
+ };
+ voice {
+ label = "voice";
+ gpios = <&gpiomm 0 1>;
+ };
+ fxs1 {
+ label = "fxs1";
+ gpios = <&gpiomm 1 1>;
+ };
+ fxs2 {
+ label = "fxs2";
+ gpios = <&gpiomm 2 1>;
+ };
+ fxo {
+ label = "fxo";
+ gpios = <&gpiomm 3 1>;
+ };
+ };
+};