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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2020-06-07 15:07:28 +0200
committerHauke Mehrtens <hauke@hauke-m.de>2021-06-26 16:05:36 +0200
commitb1df48caac1b3f75a65768a5abf8de84801edbf0 (patch)
tree6a5f5e9ec3b0a1e2f07feb18a872fa830ecf990f /target/linux/lantiq/files
parentdea4bae7c2b963af02e1e3e3bdb5cd656a5ea3d3 (diff)
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lantiq: xrx200: switch the subtarget to the mainline DSA driver
Enable the XRX200 PMAC, GSWIP DSA tag and GSIP DSA drivers in the 5.4 kernel config. Update the existing vr9_*.dts{,i} to use the new Ethernet and switch drivers. Drop the swconfig package from the xrx200 target because swconfig doesn't manage DSA based switches. The new /etc/config/network format for the DSA driver is not compatible with the old (swconfig) based one. Show a message during sysupgrade notifying users about this change and asking them to start with a fresh config (or forcefully update and then migrate the config manually). Failsafe mode can now automatically bring up the first lan interface based on board.json including DSA based setups. Drop 05_set_preinit_iface_lantiq from the xRX200 sub-target as this is not needed anymore. For now we are keeping it for the ase, xway and xway_legacy until there's some confirmation that it can be dropped from there as well. While here, some boards also receive minor fixups: - Use LAN1 as LAN1 (according to a photo this port can also be configured as WAN) on the Buffalo WBMR-300HPD. This makes it easier to read the port mapping because otherwise we would have LAN{2,3,4} and WAN (which was the case for the non-DSA version previously). - vr9_avm_fritz3390.dts: move the "gpio" comment from port 0 and 1 to their corresponding PHYs - vr9_tplink_vr200.dtsi: move the "gpio" comment from port 0 to PHY 0 - vr9_tplink_tdw89x0.dtsi: move the "gpio" comment from port 0 to PHY 0 Acked-by: Aleksander Jan Bajkowski <A.Bajkowski@stud.elka.pw.edu.pl> Tested-by: Notupus <notpp46@googlemail.com> # TD-W9980/DM200/FRITZ 7430 Tested-by: Martin Schiller <ms@dev.tdt.de> # tested on TDT VR2020 Tested-by: Martin Schiller <ms@dev.tdt.de> # tested on TP-Link TD-W8980B Tested-by: Martin Schiller <ms@dev.tdt.de> # tested on ZyXEL P-2812HNU-F1 Tested-by: Daniel Kestrel <kestrel1974@t-online.de> # tested on Fritzbox 7490 Tested-by: Daniel Kestrel <kestrel1974@t-online.de> # tested on Fritzbox 3490 Tested-by: @jospezial <jospezial@gmx.de> # tested on VGV7510KW22 (o2 Box 6431) Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Diffstat (limited to 'target/linux/lantiq/files')
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi89
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_alphanetworks_asl56026.dts64
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts123
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vg3503j.dts88
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7510kw22.dtsi131
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7519.dtsi128
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3370-rev2.dtsi121
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts121
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi122
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7412.dts36
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7430.dts106
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_bt_homehub-v5a.dts124
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_buffalo_wbmr-300hpd.dts100
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_lantiq_easy80920.dtsi133
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_netgear_dm200.dts40
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi109
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi109
-rw-r--r--target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_zyxel_p-2812hnu-fx.dtsi132
18 files changed, 840 insertions, 1036 deletions
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi
index 22d5509a33..27858be28f 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9.dtsi
@@ -120,22 +120,6 @@
ranges = <0x0 0x203000 0x100>;
big-endian;
- gphy0: gphy@20 {
- compatible = "lantiq,xrx200-gphy";
- reg = <0x20 0x4>;
-
- resets = <&reset0 31 30>, <&reset1 7 7>;
- reset-names = "gphy", "gphy2";
- };
-
- gphy1: gphy@68 {
- compatible = "lantiq,xrx200-gphy";
- reg = <0x68 0x4>;
-
- resets = <&reset0 29 28>, <&reset1 6 6>;
- reset-names = "gphy", "gphy2";
- };
-
reset0: reset-controller@10 {
compatible = "lantiq,xrx200-reset";
reg = <0x10 4>, <0x14 4>;
@@ -446,22 +430,71 @@
};
};
- eth0: eth@e108000 {
+ gswip: switch@e108000 {
+ compatible = "lantiq,xrx200-gswip";
#address-cells = <1>;
#size-cells = <0>;
+ reg = < 0xe108000 0x3000 /* switch */
+ 0xe10b100 0x70 /* mdio */
+ 0xe10b1d8 0x30 /* mii */
+ >;
+
+ dsa,member = <0 0>;
+
+ gswip_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@6 {
+ reg = <0x6>;
+ label = "cpu";
+ ethernet = <&eth0>;
+ };
+ };
+
+ gswip_mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "lantiq,xrx200-mdio";
+ };
+
+ gphy-fw {
+ compatible = "lantiq,xrx200-gphy-fw", "lantiq,gphy-fw";
+ lantiq,rcu = <&rcu0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gphy0: gphy@20 {
+ reg = <0x20>;
+
+ resets = <&reset0 31 30>;
+ reset-names = "gphy";
+ };
+
+ gphy1: gphy@68 {
+ reg = <0x68>;
+
+ resets = <&reset0 29 28>;
+ reset-names = "gphy";
+ };
+ };
+ };
+
+ eth0: eth@e10b308 {
compatible = "lantiq,xrx200-net";
- reg = < 0xe108000 0x3000 /* switch */
- 0xe10b100 0x70 /* mdio */
- 0xe10b1d8 0x30 /* mii */
- 0xe10b308 0x30 /* pmac */
- >;
+ reg = <0xe10b308 0x30>; /* pmac */
interrupt-parent = <&icu0>;
- interrupts = <75 73 72>;
- resets = <&reset0 21 16>, <&reset0 8 8>;
- reset-names = "switch", "ppe";
- lantiq,phys = <&gphy0>, <&gphy1>;
- pinctrl-0 = <&mdio_pins>;
- pinctrl-names = "default";
+ interrupts = <73>, <72>;
+ interrupt-names = "tx", "rx";
+ resets = <&reset0 21 16>, <&reset0 8 8>, <&reset0 3 3>;
+ reset-names = "switch", "ppe", "ppe_dsp";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
};
mei@e116000 {
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_alphanetworks_asl56026.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_alphanetworks_asl56026.dts
index 84a2a93428..77fcff3392 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_alphanetworks_asl56026.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_alphanetworks_asl56026.dts
@@ -69,52 +69,38 @@
};
};
-&eth0 {
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- lantiq,switch;
-
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "mii";
- phy-handle = <&phy11>;
- };
-
- ethernet@3 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <3>;
- phy-mode = "mii";
- phy-handle = <&phy14>;
- };
- };
+&gphy0 {
+ lantiq,gphy-mode = <GPHY_MODE_FE>;
+};
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
+&gphy1 {
+ lantiq,gphy-mode = <GPHY_MODE_FE>;
+};
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
+&gswip_mdio {
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
- phy14: ethernet-phy@14 {
- reg = <0x14>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
+ phy14: ethernet-phy@14 {
+ reg = <0x14>;
};
};
-&gphy0 {
- lantiq,gphy-mode = <GPHY_MODE_FE>;
-};
+&gswip_ports {
+ port@2 {
+ reg = <2>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
-&gphy1 {
- lantiq,gphy-mode = <GPHY_MODE_FE>;
+ port@3 {
+ reg = <3>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy14>;
+ };
};
&localbus {
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts
index c924a2b275..4b7343207e 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_arv7519rw22.dts
@@ -94,72 +94,7 @@
};
&eth0 {
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- mtd-mac-address = <&boardconfig 0x16>;
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "rgmii";
- phy-handle = <&phy0>;
- };
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "mii";
- phy-handle = <&phy11>;
- };
- ethernet@3 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <3>;
- phy-mode = "mii";
- phy-handle = <&phy12>;
- };
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "mii";
- phy-handle = <&phy13>;
- };
- ethernet@5 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <5>;
- phy-mode = "mii";
- phy-handle = <&phy14>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- phy12: ethernet-phy@12 {
- reg = <0x12>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- phy14: ethernet-phy@14 {
- reg = <0x14>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- };
+ mtd-mac-address = <&boardconfig 0x16>;
};
&gphy0 {
@@ -183,6 +118,62 @@
};
};
+&gswip {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+ phy12: ethernet-phy@12 {
+ reg = <0x12>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+ phy14: ethernet-phy@14 {
+ reg = <0x14>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "lan5";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ phy-mode = "internal";
+ phy-handle = <&phy12>;
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+ port@5 {
+ reg = <5>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy14>;
+ };
+};
+
&localbus {
flash@0 {
compatible = "lantiq,nor";
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vg3503j.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vg3503j.dts
index e7c5532145..fb771edcb7 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vg3503j.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vg3503j.dts
@@ -54,56 +54,6 @@
};
};
-&eth0 {
- pinctrl-0 = <&mdio_pins>,
- <&gphy0_led0_pins>, <&gphy0_led1_pins>, <&gphy0_led2_pins>,
- <&gphy1_led0_pins>, <&gphy1_led1_pins>, <&gphy1_led2_pins>;
-
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- lantiq,switch;
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "mii";
- phy-handle = <&phy11>;
- };
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "mii";
- phy-handle = <&phy13>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,led1h = <0x70>;
- lantiq,led1l = <0x00>;
- lantiq,led2h = <0x00>;
- lantiq,led2l = <0x03>;
- };
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- lantiq,led1h = <0x70>;
- lantiq,led1l = <0x00>;
- lantiq,led2h = <0x00>;
- lantiq,led2l = <0x03>;
- };
- };
-};
-
&gphy0 {
lantiq,gphy-mode = <GPHY_MODE_GE>;
};
@@ -112,6 +62,44 @@
lantiq,gphy-mode = <GPHY_MODE_GE>;
};
+&gswip {
+ pinctrl-0 = <&gphy0_led0_pins>, <&gphy0_led1_pins>, <&gphy0_led2_pins>,
+ <&gphy1_led0_pins>, <&gphy1_led1_pins>, <&gphy1_led2_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ lantiq,led1h = <0x70>;
+ lantiq,led1l = <0x00>;
+ lantiq,led2h = <0x00>;
+ lantiq,led2l = <0x03>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ lantiq,led1h = <0x70>;
+ lantiq,led1l = <0x00>;
+ lantiq,led2h = <0x00>;
+ lantiq,led2l = <0x03>;
+ };
+};
+
+&gswip_ports {
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+};
+
&localbus {
flash@0 {
compatible = "lantiq,nor";
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7510kw22.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7510kw22.dtsi
index 696a61a861..8faf335c02 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7510kw22.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7510kw22.dtsi
@@ -107,78 +107,7 @@
};
&eth0 {
- pinctrl-0 = <&mdio_pins>,
- <&gphy0_led0_pins>,
- <&gphy1_led0_pins>, <&gphy1_led1_pins>;
- pinctrl-names = "default";
-
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- mtd-mac-address = <&boardconfig 0x16>;
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "mii";
- phy-handle = <&phy1>;
- };
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "mii";
- phy-handle = <&phy11>;
- };
- ethernet@3 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <3>;
- phy-mode = "mii";
- phy-handle = <&phy12>;
- };
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "mii";
- phy-handle = <&phy13>;
- };
- ethernet@5 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <5>;
- phy-mode = "mii";
- phy-handle = <&phy14>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy1: ethernet-phy@1 {
- reg = <0x1>;
- compatible = "ethernet-phy-ieee802.3-c22";
- };
-
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- phy12: ethernet-phy@12 {
- reg = <0x12>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- phy14: ethernet-phy@14 {
- reg = <0x14>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- };
+ mtd-mac-address = <&boardconfig 0x16>;
};
&gphy0 {
@@ -203,6 +132,64 @@
};
};
+&gswip {
+ pinctrl-0 = <&mdio_pins>,
+ <&gphy0_led0_pins>,
+ <&gphy1_led0_pins>, <&gphy1_led1_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+ phy12: ethernet-phy@12 {
+ reg = <0x12>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+ phy14: ethernet-phy@14 {
+ reg = <0x14>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "wan";
+ phy-mode = "mii";
+ phy-handle = <&phy1>;
+ };
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ port@3 {
+ reg = <3>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy12>;
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+ port@5 {
+ reg = <5>;
+ label = "lan3";
+ phy-mode = "internal";
+ phy-handle = <&phy14>;
+ };
+};
+
&localbus {
flash@0 {
compatible = "lantiq,nor";
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7519.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7519.dtsi
index 08d9148faf..7c3ab53d73 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7519.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vgv7519.dtsi
@@ -127,76 +127,8 @@
};
&eth0 {
- pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led0_pins>;
- pinctrl-names = "default";
-
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- mtd-mac-address = <&boardconfig 0x16>;
- mtd-mac-address-increment = <1>;
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "rgmii";
- phy-handle = <&phy0>;
- };
- ethernet@1 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <1>;
- phy-mode = "rgmii";
- phy-handle = <&phy1>;
- };
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "gmii";
- phy-handle = <&phy11>;
- };
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "gmii";
- phy-handle = <&phy13>;
- };
- ethernet@5 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <5>;
- phy-mode = "rgmii";
- phy-handle = <&phy5>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy1: ethernet-phy@1 {
- reg = <0x1>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy5: ethernet-phy@5 {
- reg = <0x5>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- };
+ mtd-mac-address = <&boardconfig 0x16>;
+ mtd-mac-address-increment = <1>;
};
&gphy0 {
@@ -221,6 +153,62 @@
};
};
+&gswip {
+ pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led0_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+ phy5: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "lan4";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ port@1 {
+ reg = <1>;
+ label = "lan3";
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+ port@5 {
+ reg = <5>;
+ label = "wan";
+ phy-mode = "rgmii";
+ phy-handle = <&phy5>;
+ };
+};
+
&localbus {
flash@0 {
compatible = "lantiq,nor";
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3370-rev2.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3370-rev2.dtsi
index 09c95375d5..664327a861 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3370-rev2.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3370-rev2.dtsi
@@ -114,72 +114,6 @@
};
};
-&eth0 {
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "rgmii";
- phy-handle = <&phy0>;
- gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
- };
-
- ethernet@1 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <1>;
- phy-mode = "rgmii";
- phy-handle = <&phy1>;
- gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
- };
-
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "gmii";
- phy-handle = <&phy11>;
- };
-
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "gmii";
- phy-handle = <&phy13>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
-
- phy1: ethernet-phy@1 {
- reg = <0x1>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
-
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
-
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- };
-};
-
&gphy0 {
lantiq,gphy-mode = <GPHY_MODE_GE>;
};
@@ -208,6 +142,61 @@
};
};
+&gswip {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ gpios = <&gpio 37 GPIO_ACTIVE_HIGH>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
+ };
+
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "lan3";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan4";
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+};
+
&pcie0 {
gpio-reset = <&gpio 21 GPIO_ACTIVE_HIGH>;
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts
index 09c97a6454..c4b92f9f91 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz3390.dts
@@ -106,72 +106,6 @@
};
};
-&eth0 {
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "rgmii";
- phy-handle = <&phy0>;
- gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
- };
-
- ethernet@1 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <1>;
- phy-mode = "rgmii";
- phy-handle = <&phy1>;
- gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
- };
-
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "gmii";
- phy-handle = <&phy11>;
- };
-
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "gmii";
- phy-handle = <&phy13>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- compatible = "ethernet-phy-ieee802.3-c22";
- };
-
- phy1: ethernet-phy@1 {
- reg = <0x1>;
- compatible = "ethernet-phy-ieee802.3-c22";
- };
-
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
-
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- };
-};
-
&gphy0 {
lantiq,gphy-mode = <GPHY_MODE_GE>;
};
@@ -207,6 +141,61 @@
};
};
+&gswip {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ gpios = <&gpio 32 GPIO_ACTIVE_HIGH>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ gpios = <&gpio 44 GPIO_ACTIVE_HIGH>;
+ };
+
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "lan3";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan4";
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+};
+
&spi {
status = "okay";
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi
index c7e600aace..dafff26f1b 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz736x.dtsi
@@ -81,71 +81,8 @@
};
&eth0 {
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- mtd-mac-address = <&urlader 0xa91>;
- mtd-mac-address-increment = <(-2)>;
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "rmii";
- phy-handle = <&phy0>;
- };
-
- ethernet@1 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <1>;
- phy-mode = "rmii";
- phy-handle = <&phy1>;
- };
-
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "gmii";
- phy-handle = <&phy11>;
- };
-
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "gmii";
- phy-handle = <&phy13>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0x00>;
- compatible = "ethernet-phy-ieee802.3-c22";
- reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
- };
-
- phy1: ethernet-phy@1 {
- reg = <0x01>;
- compatible = "ethernet-phy-ieee802.3-c22";
- reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
- };
-
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
-
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- };
+ mtd-mac-address = <&urlader 0xa91>;
+ mtd-mac-address-increment = <(-2)>;
};
&gphy0 {
@@ -171,6 +108,61 @@
};
+&gswip {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0x00>;
+ reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
+ };
+
+ phy1: ethernet-phy@1 {
+ reg = <0x01>;
+ reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
+ };
+
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "lan3";
+ phy-mode = "rmii";
+ phy-handle = <&phy0>;
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan4";
+ phy-mode = "rmii";
+ phy-handle = <&phy1>;
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+};
+
&pcie0 {
status = "okay";
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7412.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7412.dts
index 3b1703dd3c..a9d20915ea 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7412.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7412.dts
@@ -181,33 +181,17 @@
lantiq,gphy-mode = <GPHY_MODE_FE>;
};
-&eth0 {
- lantiq,phys = <&gphy0>;
-
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- mac-address = [ 00 11 22 33 44 55 ];
- lantiq,switch;
-
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "mii";
- phy-handle = <&phy11>;
- };
+&gswip_mdio {
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
};
+};
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
+&gswip_ports {
+ port@2 {
+ reg = <2>;
+ label = "lan";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
};
};
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7430.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7430.dts
index 3894fecb43..3be20e1ff0 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7430.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_avm_fritz7430.dts
@@ -185,70 +185,6 @@
lantiq,gphy-mode = <GPHY_MODE_FE>;
};
-&eth0 {
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- lantiq,switch;
-
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "mii";
- phy-handle = <&phy11>;
- };
-
- ethernet@3 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <3>;
- phy-mode = "mii";
- phy-handle = <&phy12>;
- };
-
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "mii";
- phy-handle = <&phy13>;
- };
-
- ethernet@5 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <5>;
- phy-mode = "mii";
- phy-handle = <&phy14>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
-
- phy12: ethernet-phy@12 {
- reg = <0x12>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
-
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
-
- phy14: ethernet-phy@14 {
- reg = <0x14>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- };
-};
-
&gpio {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@@ -262,6 +198,48 @@
};
};
+&gswip_mdio {
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+ phy12: ethernet-phy@12 {
+ reg = <0x12>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+ phy14: ethernet-phy@14 {
+ reg = <0x14>;
+ };
+};
+
+&gswip_ports {
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ phy-mode = "internal";
+ phy-handle = <&phy12>;
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+ port@5 {
+ reg = <5>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy14>;
+ };
+};
+
&usb_phy0 {
status = "okay";
};
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_bt_homehub-v5a.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_bt_homehub-v5a.dts
index f817b3a41b..e24ee787f1 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_bt_homehub-v5a.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_bt_homehub-v5a.dts
@@ -114,74 +114,6 @@
};
};
-&eth0 {
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "rgmii";
- phy-handle = <&phy0>;
- };
- ethernet@1 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <1>;
- phy-mode = "rgmii";
- phy-handle = <&phy1>;
- };
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "gmii";
- phy-handle = <&phy11>;
- };
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "gmii";
- phy-handle = <&phy13>;
- };
- ethernet@5 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <5>;
- phy-mode = "rgmii";
- phy-handle = <&phy5>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy1: ethernet-phy@1 {
- reg = <0x1>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy5: ethernet-phy@5 {
- reg = <0x5>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- };
-};
-
&gphy0 {
lantiq,gphy-mode = <GPHY_MODE_GE>;
};
@@ -215,6 +147,62 @@
};
};
+&gswip {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+ phy5: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "lan3";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ port@1 {
+ reg = <1>;
+ label = "lan4";
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+ port@5 {
+ reg = <5>;
+ label = "wan";
+ phy-mode = "rgmii";
+ phy-handle = <&phy5>;
+ };
+};
+
&localbus {
flash@1 {
compatible = "lantiq,nand-xway";
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_buffalo_wbmr-300hpd.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_buffalo_wbmr-300hpd.dts
index 8917d359e7..eea27a2a1f 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_buffalo_wbmr-300hpd.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_buffalo_wbmr-300hpd.dts
@@ -152,64 +152,6 @@
};
};
-&eth0 {
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- lantiq,switch;
-
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "mii";
- phy-handle = <&phy11>;
- };
- ethernet@3 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <3>;
- phy-mode = "mii";
- phy-handle = <&phy12>;
- };
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "mii";
- phy-handle = <&phy13>;
- };
- ethernet@5 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <5>;
- phy-mode = "mii";
- phy-handle = <&phy14>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- phy12: ethernet-phy@12 {
- reg = <0x12>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- phy14: ethernet-phy@14 {
- reg = <0x14>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
- };
-};
-
&gphy0 {
lantiq,gphy-mode = <GPHY_MODE_FE>;
};
@@ -237,6 +179,48 @@
};
};
+&gswip_mdio {
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+ phy12: ethernet-phy@12 {
+ reg = <0x12>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+ phy14: ethernet-phy@14 {
+ reg = <0x14>;
+ };
+};
+
+&gswip_ports {
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ port@3 {
+ reg = <3>;
+ label = "lan4";
+ phy-mode = "internal";
+ phy-handle = <&phy12>;
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+ port@5 {
+ reg = <5>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy14>;
+ };
+};
+
&spi {
status = "okay";
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_lantiq_easy80920.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_lantiq_easy80920.dtsi
index 9cac3e6ec0..8df81111fa 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_lantiq_easy80920.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_lantiq_easy80920.dtsi
@@ -97,83 +97,6 @@
};
};
-&eth0 {
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "rgmii";
- phy-handle = <&phy0>;
- };
- ethernet@1 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <1>;
- phy-mode = "rgmii";
- phy-handle = <&phy1>;
- };
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "gmii";
- phy-handle = <&phy11>;
- };
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "gmii";
- phy-handle = <&phy13>;
- };
- };
-
- interface@1 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <1>;
- lantiq,wan;
-
- ethernet@5 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <5>;
- phy-mode = "rgmii";
- phy-handle = <&phy5>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy1: ethernet-phy@1 {
- reg = <0x1>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy5: ethernet-phy@5 {
- reg = <0x5>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- };
-};
-
&gphy0 {
lantiq,gphy-mode = <GPHY_MODE_GE>;
};
@@ -210,6 +133,62 @@
};
};
+&gswip {
+ pinctrl-0 = <&mdio_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+ phy5: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "lan4";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ port@1 {
+ reg = <1>;
+ label = "lan3";
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+ port@5 {
+ reg = <5>;
+ label = "wan";
+ phy-mode = "rgmii";
+ phy-handle = <&phy5>;
+ };
+};
+
&spi {
status = "okay";
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_netgear_dm200.dts b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_netgear_dm200.dts
index be4810c431..b817ff3224 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_netgear_dm200.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_netgear_dm200.dts
@@ -83,37 +83,23 @@
};
};
-&eth0 {
- lantiq,phys = <&gphy1>;
-
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
-
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "mii";
- phy-handle = <&phy13>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
+&gphy1 {
+ lantiq,gphy-mode = <GPHY_MODE_FE>;
+};
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy22f", "ethernet-phy-ieee802.3-c22";
- };
+&gswip_mdio {
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
};
};
-&gphy1 {
- lantiq,gphy-mode = <GPHY_MODE_FE>;
+&gswip_ports {
+ port@4 {
+ reg = <4>;
+ label = "lan";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
};
&pcie0 {
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi
index d33b817f2d..10389e539f 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_tdw89x0.dtsi
@@ -110,66 +110,7 @@
};
&eth0 {
- pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
- pinctrl-names = "default";
-
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- mtd-mac-address = <&ath9k_cal 0xf100>;
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "rgmii";
- phy-handle = <&phy0>;
- // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
- };
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "gmii";
- phy-handle = <&phy11>;
- };
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "gmii";
- phy-handle = <&phy13>;
- };
- ethernet@5 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <5>;
- phy-mode = "rgmii";
- phy-handle = <&phy5>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy5: ethernet-phy@5 {
- reg = <0x5>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- };
+ mtd-mac-address = <&ath9k_cal 0xf100>;
};
&gphy0 {
@@ -199,6 +140,54 @@
};
};
+&gswip {
+ pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ // reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+ };
+ phy5: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "lan2";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+ port@5 {
+ reg = <5>;
+ label = "lan1";
+ phy-mode = "rgmii";
+ phy-handle = <&phy5>;
+ };
+};
+
&pcie0 {
pcie@0 {
reg = <0 0 0 0 0>;
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi
index aa76f66267..d3d8907860 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_tplink_vr200.dtsi
@@ -100,66 +100,7 @@
};
&eth0 {
- pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
- pinctrl-names = "default";
-
- lan: interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- mtd-mac-address = <&romfile 0xf100>;
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "rgmii";
- phy-handle = <&phy0>;
- // gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
- };
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "gmii";
- phy-handle = <&phy11>;
- };
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "gmii";
- phy-handle = <&phy13>;
- };
- ethernet@5 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <5>;
- phy-mode = "rgmii";
- phy-handle = <&phy5>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy5: ethernet-phy@5 {
- reg = <0x5>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- };
+ mtd-mac-address = <&romfile 0xf100>;
};
&gphy0 {
@@ -189,6 +130,54 @@
};
};
+&gswip {
+ pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ // reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
+ };
+ phy5: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "lan3";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan1";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+ port@5 {
+ reg = <5>;
+ label = "lan4";
+ phy-mode = "rgmii";
+ phy-handle = <&phy5>;
+ };
+};
+
&pcie0 {
pcie@0 {
reg = <0 0 0 0 0>;
diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_zyxel_p-2812hnu-fx.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_zyxel_p-2812hnu-fx.dtsi
index ee951dc3be..ff7dce3477 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_zyxel_p-2812hnu-fx.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_zyxel_p-2812hnu-fx.dtsi
@@ -110,80 +110,6 @@
};
};
-&eth0 {
- pinctrl-0 = <&mdio_pins>,
- <&gphy0_led1_pins>, <&gphy0_led2_pins>,
- <&gphy1_led1_pins>, <&gphy1_led2_pins>;
- pinctrl-names = "default";
-
- interface@0 {
- compatible = "lantiq,xrx200-pdi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0>;
- mac-address = [ 00 11 22 33 44 55 ];
- lantiq,switch;
-
- ethernet@0 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <0>;
- phy-mode = "rgmii";
- phy-handle = <&phy0>;
- };
- ethernet@1 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <1>;
- phy-mode = "rgmii";
- phy-handle = <&phy1>;
- };
- ethernet@2 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <2>;
- phy-mode = "gmii";
- phy-handle = <&phy11>;
- };
- ethernet@4 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <4>;
- phy-mode = "gmii";
- phy-handle = <&phy13>;
- };
- ethernet@5 {
- compatible = "lantiq,xrx200-pdi-port";
- reg = <5>;
- phy-mode = "rgmii";
- phy-handle = <&phy5>;
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "lantiq,xrx200-mdio";
-
- phy0: ethernet-phy@0 {
- reg = <0x0>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy1: ethernet-phy@1 {
- reg = <0x1>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy5: ethernet-phy@5 {
- reg = <0x5>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy11: ethernet-phy@11 {
- reg = <0x11>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- phy13: ethernet-phy@13 {
- reg = <0x13>;
- compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
- };
- };
-};
-
&gphy0 {
lantiq,gphy-mode = <GPHY_MODE_GE>;
};
@@ -221,6 +147,64 @@
};
};
+&gswip {
+ pinctrl-0 = <&mdio_pins>,
+ <&gphy0_led1_pins>, <&gphy0_led2_pins>,
+ <&gphy1_led1_pins>, <&gphy1_led2_pins>;
+ pinctrl-names = "default";
+};
+
+&gswip_mdio {
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+ phy5: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ };
+};
+
+&gswip_ports {
+ port@0 {
+ reg = <0>;
+ label = "lan1";
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ port@1 {
+ reg = <1>;
+ label = "lan2";
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+ port@2 {
+ reg = <2>;
+ label = "lan3";
+ phy-mode = "internal";
+ phy-handle = <&phy11>;
+ };
+ port@4 {
+ reg = <4>;
+ label = "lan4";
+ phy-mode = "internal";
+ phy-handle = <&phy13>;
+ };
+ port@5 {
+ reg = <5>;
+ label = "wan";
+ phy-mode = "rgmii";
+ phy-handle = <&phy5>;
+ };
+};
+
&pci0 {
status = "okay";