lantiq: dts: define the SPI pins in {amazonse,ar9,vr9}.dtsi

Define the SPI pins in the corresponding SoCs.dtsi and assign them to
the SPI controller node. All known boards use CS4 and it's likely that
this is hardcoded in bootrom so this doesn't bother with having
per-board SPI pinmux settings.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

1 files changed, 22 insertions, 0 deletions

diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi
index 3244908e32..ab518e75c6 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi
@@ -160,6 +160,8 @@
 					"spi_frm";
 			#address-cells = <1>;
 			#size-cells = <0>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spi_pins>, <&spi_cs4_pins>;
 			status = "disabled";
 		};
 
@@ -175,6 +177,26 @@
 					lantiq,function = "mdio";
 				};
 			};
+
+			spi_pins: spi {
+				mux-0 {
+					lantiq,groups = "spi_di";
+					lantiq,function = "spi";
+				};
+				mux-1 {
+					lantiq,groups = "spi_do", "spi_clk";
+					lantiq,function = "spi";
+					lantiq,output = <1>;
+				};
+			};
+
+			spi_cs4_pins: spi-cs4 {
+				mux {
+					lantiq,groups = "spi_cs4";
+					lantiq,function = "spi";
+					lantiq,output = <1>;
+				};
+			};
 		};
 
 		stp: stp@e100bb0 {