lantiq: dts: assign the NAND pins to the nand-controller node

Assign the NAND pins to the NAND controller node instead of using pin
hogging (where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.

While here, define all NAND pins (CLE, ALE, read/RD, ready busy/RDY and
CE/CS1). This means that the pinctrl subsystem knows that these pins are
in use and cannot be re-assigned as GPIOs for example.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

1 files changed, 26 insertions, 0 deletions

diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi b/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi
index ab518e75c6..da56485214 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/ar9.dtsi
@@ -178,6 +178,32 @@
 				};
 			};
 
+			nand_pins: nand {
+				mux-0 {
+					lantiq,groups = "nand cle", "nand ale",
+							"nand rd";
+					lantiq,function = "ebu";
+					lantiq,output = <1>;
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+				mux-1 {
+					lantiq,groups = "nand rdy";
+					lantiq,function = "ebu";
+					lantiq,output = <0>;
+					lantiq,pull = <2>;
+				};
+			};
+
+			nand_cs1_pins: nand-cs1 {
+				mux {
+					lantiq,groups = "nand cs1";
+					lantiq,function = "ebu";
+					lantiq,open-drain = <0>;
+					lantiq,pull = <0>;
+				};
+			};
+
 			spi_pins: spi {
 				mux-0 {
 					lantiq,groups = "spi_di";