lantiq: dts: assign the NAND pins to the nand-controller node

Assign the NAND pins to the NAND controller node instead of using pin
hogging (where pins are assigned to the pin controller).
This is the preferred way of assigning pins upstream.

While here, define all NAND pins (CLE, ALE, read/RD, ready busy/RDY and
CE/CS1). This means that the pinctrl subsystem knows that these pins are
in use and cannot be re-assigned as GPIOs for example.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>

1 files changed, 3 insertions, 13 deletions

diff --git a/target/linux/lantiq/files/arch/mips/boot/dts/BTHOMEHUBV2B.dts b/target/linux/lantiq/files/arch/mips/boot/dts/BTHOMEHUBV2B.dts
index 2b3afb2295..5d69ed8d72 100644
--- a/target/linux/lantiq/files/arch/mips/boot/dts/BTHOMEHUBV2B.dts
+++ b/target/linux/lantiq/files/arch/mips/boot/dts/BTHOMEHUBV2B.dts
@@ -108,19 +108,6 @@
 	pinctrl-0 = <&state_default>;
 
 	state_default: pinmux {
-		nand_out {
-			lantiq,groups = "nand cle", "nand ale";
-			lantiq,function = "ebu";
-			lantiq,output = <1>;
-			lantiq,open-drain = <0>;
-			lantiq,pull = <0>;
-		};
-		nand_cs1 {
-			lantiq,groups = "nand cs1";
-			lantiq,function = "ebu";
-			lantiq,open-drain = <0>;
-			lantiq,pull = <0>;
-		};
 		exin {
 			lantiq,groups = "exin1";
 			lantiq,function = "exin";
@@ -209,6 +196,9 @@
 		reg = <1 0x0 0x2000000 >;
 		req-mask = <0x1>;  /* PCI request lines to mask during NAND access */
 
+		pinctrl-0 = <&nand_pins>, <&nand_cs1_pins>;
+		pinctrl-names = "default";
+
 		partitions {
 			compatible = "fixed-partitions";
 			#address-cells = <1>;