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authorMathias Kresin <dev@kresin.me>2019-07-10 12:29:03 +0200
committerMathias Kresin <dev@kresin.me>2020-03-16 22:28:17 +0100
commit6bf179b27004eb76df3e466bd080fc5a83ccf0dd (patch)
tree9abd2e8d534bc8d6871930d8c814eba61cb6fa46 /target/linux/lantiq/files-5.4/arch/mips
parent3d5d56487dd627f50aa69aba907ccb6049070c9c (diff)
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lantiq: add Linux 5.4 support as testing kernel version
Switch to the mainline Lantiq PCIe PHY driver and update the vr9.dtsi accordingly. The Lantiq IRQ SMP support added upstream required changes to the SoC dtsi as well. Following changes are made to the Lantiq kernel patches: 0005-lantiq_etop-pass-struct-device-to-DMA-API-functions.patch 0006-MIPS-lantiq-pass-struct-device-to-DMA-API-functions.patch applied upstream 0008-MIPS-lantiq-backport-old-timer-code.patch access_ok API update because it lost it's type (which was the first) parameter in upstream commit 96d4f267e40f95 ("Remove 'type' argument from access_ok() function") 0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch merged into 0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch 0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch revert upstream changes required for upstream xrx200 ethernet and xrx200 (DSA) switch driver but breaking our driver 0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch required for our driver but dropped upstream, add former upstream version 0028-NET-lantiq-various-etop-fixes.patch now has to use the phy_set_max_speed API instead of modifying phydev->supported. Also call ltq_dma_enable_irq() in ltq_etop_open() based on upstream commit cc973aecf0b054 ("MIPS: lantiq: Do not enable IRQs in dma open") Signed-off-by: Mathias Kresin <dev@kresin.me> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Diffstat (limited to 'target/linux/lantiq/files-5.4/arch/mips')
-rw-r--r--target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/amazonse.dtsi6
-rw-r--r--target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/ar9.dtsi7
-rw-r--r--target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/danube.dtsi10
-rw-r--r--target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/falcon.dtsi7
-rw-r--r--target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9.dtsi27
5 files changed, 32 insertions, 25 deletions
diff --git a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/amazonse.dtsi b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/amazonse.dtsi
index 496150b7a7..f2845ee4ac 100644
--- a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/amazonse.dtsi
+++ b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/amazonse.dtsi
@@ -42,11 +42,7 @@
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,icu";
- reg = <0x80200 0x28
- 0x80228 0x28
- 0x80250 0x28
- 0x80278 0x28
- 0x802a0 0x28>;
+ reg = <0x80200 0xc8>;
};
watchdog@803f0 {
diff --git a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/ar9.dtsi b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/ar9.dtsi
index 12af82b8ce..d4afd23f7b 100644
--- a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/ar9.dtsi
+++ b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/ar9.dtsi
@@ -42,11 +42,8 @@
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,icu";
- reg = <0x80200 0x28
- 0x80228 0x28
- 0x80250 0x28
- 0x80278 0x28
- 0x802a0 0x28>;
+ /* TODO: AR9 should have ICU1 (like VR9) too */
+ reg = <0x80200 0xc8>;
};
watchdog@803f0 {
diff --git a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/danube.dtsi b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/danube.dtsi
index ae8c1c045a..eae613e008 100644
--- a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/danube.dtsi
+++ b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/danube.dtsi
@@ -42,11 +42,11 @@
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,icu";
- reg = <0x80200 0x28
- 0x80228 0x28
- 0x80250 0x28
- 0x80278 0x28
- 0x802a0 0x28>;
+ /*
+ * There is a second ICU, but the SoC is not SMP
+ * capable.
+ */
+ reg = <0x80200 0xc8>;
};
watchdog@803f0 {
diff --git a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/falcon.dtsi b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/falcon.dtsi
index dada3bcff2..cf9b33ea93 100644
--- a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/falcon.dtsi
+++ b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/falcon.dtsi
@@ -268,11 +268,8 @@
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,icu";
- reg = <0x80200 0x28
- 0x80228 0x28
- 0x80250 0x28
- 0x80278 0x28
- 0x802a0 0x28>;
+ /* TODO: Number of ICUs isn't known */
+ reg = <0x80200 0xc8>;
};
watchdog@803f0 {
diff --git a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9.dtsi b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9.dtsi
index 35b1f180a5..19f42d8c84 100644
--- a/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9.dtsi
+++ b/target/linux/lantiq/files-5.4/arch/mips/boot/dts/lantiq/vr9.dtsi
@@ -1,4 +1,5 @@
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>
/ {
#address-cells = <1>;
@@ -46,11 +47,8 @@
#interrupt-cells = <1>;
interrupt-controller;
compatible = "lantiq,icu";
- reg = <0x80200 0x28
- 0x80228 0x28
- 0x80250 0x28
- 0x80278 0x28
- 0x802a0 0x28>;
+ reg = <0x80200 0xc8 /* icu0 */
+ 0x80300 0xc8>; /* icu1 */
};
watchdog@803f0 {
@@ -100,6 +98,18 @@
interrupts = <150 151 152 153 154 155>;
};
+ pcie0_phy: phy@106800 {
+ compatible = "lantiq,vrx200-pcie-phy";
+ reg = <0x106800 0x100>;
+ lantiq,rcu = <&rcu0>;
+ lantiq,rcu-endian-offset = <0x4c>;
+ lantiq,rcu-big-endian-mask = <0x80>; /* bit 7 */
+ big-endian;
+ resets = <&reset0 12 24>, <&reset0 22 22>;
+ reset-names = "phy", "pcie";
+ #phy-cells = <1>;
+ };
+
rcu0: rcu@203000 {
#address-cells = <1>;
#size-cells = <1>;
@@ -465,6 +475,13 @@
interrupt-parent = <&icu0>;
interrupts = <161 144>;
+ phys = <&pcie0_phy LANTIQ_PCIE_PHY_MODE_36MHZ>;
+ phy-names = "pcie";
+
+ resets = <&reset0 22 22>;
+
+ lantiq,rcu = <&rcu0>;
+
device_type = "pci";
gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;