diff options
author | Felix Fietkau <nbd@openwrt.org> | 2015-12-04 18:35:20 +0000 |
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committer | Felix Fietkau <nbd@openwrt.org> | 2015-12-04 18:35:20 +0000 |
commit | 93302969323788da572c229db322aaa070043f9d (patch) | |
tree | f94a5205645a83972a2fe866ad35022231576b7e /target/linux/lantiq/dts/TDW89X0.dtsi | |
parent | b963cec01cea5bf75387ca69032f216c95773441 (diff) | |
download | upstream-93302969323788da572c229db322aaa070043f9d.tar.gz upstream-93302969323788da572c229db322aaa070043f9d.tar.bz2 upstream-93302969323788da572c229db322aaa070043f9d.zip |
lantiq: re-enable spi-xway for TD-W89X0 now that it is fixed
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
SVN-Revision: 47768
Diffstat (limited to 'target/linux/lantiq/dts/TDW89X0.dtsi')
-rw-r--r-- | target/linux/lantiq/dts/TDW89X0.dtsi | 104 |
1 files changed, 46 insertions, 58 deletions
diff --git a/target/linux/lantiq/dts/TDW89X0.dtsi b/target/linux/lantiq/dts/TDW89X0.dtsi index 8ee036c8c9..93b186a14c 100644 --- a/target/linux/lantiq/dts/TDW89X0.dtsi +++ b/target/linux/lantiq/dts/TDW89X0.dtsi @@ -10,6 +10,49 @@ }; fpi@10000000 { + spi@E100800 { + compatible = "lantiq,spi-xway"; + reg = <0xE100800 0x100>; + interrupt-parent = <&icu0>; + interrupts = <22 23 24>; + #address-cells = <1>; + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <3>; + spi-max-frequency = <20000000>; + + partition@0 { + reg = <0x0 0x20000>; + label = "u-boot"; + read-only; + }; + + partition@20000 { + reg = <0x20000 0x6a0000>; + label = "firmware"; + }; + + partition@6c0000 { + reg = <0x6c0000 0x100000>; + label = "dsl_fw"; + }; + + partition@7c0000 { + reg = <0x7c0000 0x10000>; + label = "config"; + read-only; + }; + + ath9k_cal: partition@7d0000 { + reg = <0x7d0000 0x30000>; + label = "boardconfig"; + read-only; + }; + }; + }; + gpio: pinmux@E100B10 { pinctrl-names = "default"; pinctrl-0 = <&state_default>; @@ -32,15 +75,9 @@ lantiq,open-drain = <0>; lantiq,output = <1>; }; - spi-in { - lantiq,pins = "io16"; - lantiq,open-drain = <1>; - lantiq,pull = <2>; - }; - spi-out { - lantiq,pins = "io10", "io17", "io18", "io21"; - lantiq,open-drain = <0>; - lantiq,pull = <2>; + spi { + lantiq,groups = "spi", "spi_cs4"; + lantiq,function = "spi"; }; pcie-rst { lantiq,pins = "io38"; @@ -142,55 +179,6 @@ compatible = "lantiq,pcie-xway"; }; - spi { - #address-cells = <1>; - #size-cells = <1>; - - compatible = "spi-gpio"; - - gpio-miso = <&gpio 16 0>; - gpio-mosi = <&gpio 17 0>; - gpio-sck = <&gpio 18 0>; - num-chipselects = <1>; - cs-gpios = <&gpio 10 1>; - - m25p80@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "jedec,spi-nor"; - reg = <0 0>; - spi-max-frequency = <1000000>; - - partition@0 { - reg = <0x0 0x20000>; - label = "u-boot"; - read-only; - }; - - partition@20000 { - reg = <0x20000 0x6a0000>; - label = "firmware"; - }; - - partition@6c0000 { - reg = <0x6c0000 0x100000>; - label = "dsl_fw"; - }; - - partition@7c0000 { - reg = <0x7c0000 0x10000>; - label = "config"; - read-only; - }; - - ath9k_cal: partition@7d0000 { - reg = <0x7d0000 0x30000>; - label = "boardconfig"; - read-only; - }; - }; - }; - ath9k_eep { compatible = "ath9k,eeprom"; ath,eep-flash = <&ath9k_cal 0x21000>; |