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authorJohn Crispin <john@openwrt.org>2013-04-25 19:03:32 +0000
committerJohn Crispin <john@openwrt.org>2013-04-25 19:03:32 +0000
commit157c86371f4eb25aa238227bcd04d6f40f23d264 (patch)
tree1101a9ebda58a539d6972691ddf3782f50579c81 /target/linux/lantiq/dts/EASY80920.dtsi
parent4664e21293e6b6eff32a443f9dfc1e77289b7bd3 (diff)
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lantiq: move dts files to thir own folder
Signed-off-by: John Crispin <blogic@openwrt.org> SVN-Revision: 36443
Diffstat (limited to 'target/linux/lantiq/dts/EASY80920.dtsi')
-rw-r--r--target/linux/lantiq/dts/EASY80920.dtsi340
1 files changed, 340 insertions, 0 deletions
diff --git a/target/linux/lantiq/dts/EASY80920.dtsi b/target/linux/lantiq/dts/EASY80920.dtsi
new file mode 100644
index 0000000000..861978f5b9
--- /dev/null
+++ b/target/linux/lantiq/dts/EASY80920.dtsi
@@ -0,0 +1,340 @@
+/include/ "vr9.dtsi"
+
+/ {
+ chosen {
+ bootargs = "console=ttyLTQ0,115200 init=/etc/preinit";
+ };
+
+ memory@0 {
+ reg = <0x0 0x4000000>;
+ };
+
+ fpi@10000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "lantiq,fpi", "simple-bus";
+ ranges = <0x0 0x10000000 0xEEFFFFF>;
+ reg = <0x10000000 0xEF00000>;
+
+ localbus@0 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "lantiq,localbus", "simple-bus";
+
+ };
+
+ spi@E100800 {
+ compatible = "lantiq,spi-xway-broken";
+ reg = <0xE100800 0x100>;
+ interrupt-parent = <&icu0>;
+ interrupts = <22 23 24>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ m25p80@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "s25fl129p0";
+ reg = <0 0>;
+ linux,modalias = "m25p80", "mx25l3205d";
+ spi-max-frequency = <1000000>;
+
+ partition@0 {
+ reg = <0x0 0x20000>;
+ label = "SPI (RO) U-Boot Image";
+ read-only;
+ };
+
+ partition@20000 {
+ reg = <0x20000 0x10000>;
+ label = "ENV_MAC";
+ read-only;
+ };
+
+ partition@30000 {
+ reg = <0x30000 0x10000>;
+ label = "DPF";
+ read-only;
+ };
+
+ partition@40000 {
+ reg = <0x40000 0x10000>;
+ label = "NVRAM";
+ read-only;
+ };
+
+ partition@500000 {
+ reg = <0x50000 0x003a0000>;
+ label = "kernel";
+ };
+ };
+ };
+
+ gpio: pinmux@E100B10 {
+ compatible = "lantiq,pinctrl-xr9";
+ pinctrl-names = "default";
+ pinctrl-0 = <&state_default>;
+
+ interrupt-parent = <&icu0>;
+ interrupts = <166 135 66 40 41 42 38>;
+
+ #gpio-cells = <2>;
+ gpio-controller;
+ reg = <0xE100B10 0xA0>;
+
+ state_default: pinmux {
+ exin3 {
+ lantiq,groups = "exin3";
+ lantiq,function = "exin";
+ };
+ stp {
+ lantiq,groups = "stp";
+ lantiq,function = "stp";
+ };
+ spi {
+ lantiq,groups = "spi", "spi_cs4";
+ lantiq,function = "spi";
+ };
+ nand {
+ lantiq,groups = "nand cle", "nand ale",
+ "nand rd", "nand rdy";
+ lantiq,function = "ebu";
+ };
+ mdio {
+ lantiq,groups = "mdio";
+ lantiq,function = "mdio";
+ };
+ pci {
+ lantiq,groups = "gnt1", "req1";
+ lantiq,function = "pci";
+ };
+ conf_out {
+ lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
+ "io4", "io5", "io6", /* stp */
+ "io21",
+ "io33";
+ lantiq,open-drain;
+ lantiq,pull = <0>;
+ lantiq,output = <1>;
+ };
+ pcie-rst {
+ lantiq,pins = "io38";
+ lantiq,pull = <0>;
+ lantiq,output = <1>;
+ };
+ conf_in {
+ lantiq,pins = "io39", /* exin3 */
+ "io48"; /* nand rdy */
+ lantiq,pull = <2>;
+ };
+ };
+ };
+
+ eth@E108000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "lantiq,xrx200-net";
+ reg = < 0xE108000 0x3000 /* switch */
+ 0xE10B100 0x70 /* mdio */
+ 0xE10B1D8 0x30 /* mii */
+ 0xE10B308 0x30 /* pmac */
+ >;
+ interrupt-parent = <&icu0>;
+ interrupts = <73 72>;
+
+ lan: interface@0 {
+ compatible = "lantiq,xrx200-pdi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ mac-address = [ 00 11 22 33 44 55 ];
+
+ ethernet@0 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <0>;
+ phy-mode = "rgmii";
+ phy-handle = <&phy0>;
+ };
+ ethernet@1 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <1>;
+ phy-mode = "rgmii";
+ phy-handle = <&phy1>;
+ };
+ ethernet@2 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <2>;
+ phy-mode = "gmii";
+ phy-handle = <&phy11>;
+ };
+ };
+
+ wan: interface@1 {
+ compatible = "lantiq,xrx200-pdi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ mac-address = [ 00 11 22 33 44 56 ];
+ lantiq,wan;
+ ethernet@5 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <5>;
+ phy-mode = "rgmii";
+ phy-handle = <&phy5>;
+ };
+ };
+
+ test: interface@2 {
+ compatible = "lantiq,xrx200-pdi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ mac-address = [ 00 11 22 33 44 57 ];
+ ethernet@4 {
+ compatible = "lantiq,xrx200-pdi-port";
+ reg = <4>;
+ phynmode0 = "gmii";
+ phy-handle = <&phy13>;
+ };
+ };
+
+ mdio@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "lantiq,xrx200-mdio";
+ phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+ lantiq,c45-reg-init = <1 0 0 0>;
+ };
+ phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+ lantiq,c45-reg-init = <1 0 0 0>;
+ };
+ phy5: ethernet-phy@5 {
+ reg = <0x5>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+ lantiq,c45-reg-init = <1 0 0 0>;
+ };
+ phy11: ethernet-phy@11 {
+ reg = <0x11>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+ lantiq,c45-reg-init = <1 0 0 0>;
+ };
+ phy13: ethernet-phy@13 {
+ reg = <0x13>;
+ compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
+ lantiq,c45-reg-init = <1 0 0 0>;
+ };
+ };
+ };
+
+ stp: stp@E100BB0 {
+ compatible = "lantiq,gpio-stp-xway";
+ reg = <0xE100BB0 0x40>;
+ #gpio-cells = <2>;
+ gpio-controller;
+
+ lantiq,shadow = <0xffff>;
+ lantiq,groups = <0x7>;
+ lantiq,dsl = <0x3>;
+ lantiq,phy1 = <0x7>;
+ lantiq,phy2 = <0x7>;
+ /* lantiq,rising; */
+ };
+
+ ifxhcd@E101000 {
+ status = "okay";
+ gpios = <&gpio 33 0>;
+ lantiq,portmask = <0x3>;
+ };
+
+ pci@E105400 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ compatible = "lantiq,pci-xway1";
+ bus-range = <0x0 0x0>;
+ ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
+ 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
+ reg = <0x7000000 0x8000 /* config space */
+ 0xE105400 0x400>; /* pci bridge */
+ lantiq,bus-clock = <33333333>;
+ /*lantiq,external-clock;*/
+ lantiq,delay-hi = <0>; /* 0ns delay */
+ lantiq,delay-lo = <0>; /* 0.0ns delay */
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ 0x7000 0 0 1 &icu0 29 1 // slot 14, irq 29
+ >;
+ gpios-reset = <&gpio 21 0>;
+ req-mask = <0x1>; /* GNT1 */
+ };
+ };
+
+ gphy-xrx200 {
+ compatible = "lantiq,phy-xrx200";
+ firmware = "lantiq/vr9_phy11g_a2x.bin";
+ phys = [ 00 01 ];
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <100>;
+/* reset {
+ label = "reset";
+ gpios = <&gpio 7 1>;
+ linux,code = <0x198>;
+ };*/
+ paging {
+ label = "paging";
+ gpios = <&gpio 11 1>;
+ linux,code = <0x100>;
+ };
+ };
+
+ gpio-leds {
+ compatible = "gpio-leds";
+
+ power {
+ label = "power";
+ gpios = <&stp 9 0>;
+ default-state = "on";
+ };
+ warning {
+ label = "warning";
+ gpios = <&stp 22 0>;
+ };
+ fxs1 {
+ label = "fxs1";
+ gpios = <&stp 21 0>;
+ };
+ fxs2 {
+ label = "fxs2";
+ gpios = <&stp 20 0>;
+ };
+ fxo {
+ label = "fxo";
+ gpios = <&stp 19 0>;
+ };
+ usb1 {
+ label = "usb1";
+ gpios = <&stp 18 0>;
+ };
+ usb2 {
+ label = "usb2";
+ gpios = <&stp 15 0>;
+ };
+ sd {
+ label = "sd";
+ gpios = <&stp 14 0>;
+ };
+ wps {
+ label = "wps";
+ gpios = <&stp 12 0>;
+ };
+ };
+};