kernel: update to version 4.4.14

Changelog: https://cdn.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.4.14

Some manual changes to target/linux/generic/patches-4.4/610-
netfilter_match_bypass_default_checks.patch were needed.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

29 files changed, 421 insertions, 910 deletions

diff --git a/target/linux/ipq806x/patches-4.4/022-add-db149-dts.patch b/target/linux/ipq806x/patches-4.4/022-add-db149-dts.patch
index 4d3e827b51..0845d3f213 100644
--- a/target/linux/ipq806x/patches-4.4/022-add-db149-dts.patch
+++ b/target/linux/ipq806x/patches-4.4/022-add-db149-dts.patch
@@ -15,7 +15,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
 
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
-@@ -506,6 +506,7 @@
+@@ -506,6 +506,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \
  	qcom-apq8084-ifc6540.dtb \
  	qcom-apq8084-mtp.dtb \
  	qcom-ipq8064-ap148.dtb \
diff --git a/target/linux/ipq806x/patches-4.4/023-ARM-dts-ipq806x-Disable-i2c-device-on-gsbi4.patch b/target/linux/ipq806x/patches-4.4/023-ARM-dts-ipq806x-Disable-i2c-device-on-gsbi4.patch
index b8c527b6ae..705306d9f0 100644
--- a/target/linux/ipq806x/patches-4.4/023-ARM-dts-ipq806x-Disable-i2c-device-on-gsbi4.patch
+++ b/target/linux/ipq806x/patches-4.4/023-ARM-dts-ipq806x-Disable-i2c-device-on-gsbi4.patch
@@ -23,7 +23,7 @@
  		gsbi5: gsbi@1a200000 {
 --- a/drivers/clk/qcom/gcc-ipq806x.c
 +++ b/drivers/clk/qcom/gcc-ipq806x.c
-@@ -294,7 +294,7 @@
+@@ -294,7 +294,7 @@ static struct clk_rcg gsbi1_uart_src = {
  			.parent_names = gcc_pxo_pll8,
  			.num_parents = 2,
  			.ops = &clk_rcg_ops,
@@ -32,7 +32,7 @@
  		},
  	},
  };
-@@ -312,7 +312,7 @@
+@@ -312,7 +312,7 @@ static struct clk_branch gsbi1_uart_clk
  			},
  			.num_parents = 1,
  			.ops = &clk_branch_ops,
@@ -41,7 +41,7 @@
  		},
  	},
  };
-@@ -890,7 +890,7 @@
+@@ -890,7 +890,7 @@ static struct clk_branch gsbi1_h_clk = {
  		.hw.init = &(struct clk_init_data){
  			.name = "gsbi1_h_clk",
  			.ops = &clk_branch_ops,
diff --git a/target/linux/ipq806x/patches-4.4/037-mtd-add-SMEM-parser-for-QCOM-platforms.patch b/target/linux/ipq806x/patches-4.4/037-mtd-add-SMEM-parser-for-QCOM-platforms.patch
index d80eb86056..7c0c803565 100644
--- a/target/linux/ipq806x/patches-4.4/037-mtd-add-SMEM-parser-for-QCOM-platforms.patch
+++ b/target/linux/ipq806x/patches-4.4/037-mtd-add-SMEM-parser-for-QCOM-platforms.patch
@@ -16,11 +16,9 @@ Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
  3 files changed, 236 insertions(+)
  create mode 100644 drivers/mtd/qcom_smem_part.c
 
-diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
-index a03ad29..debc887 100644
 --- a/drivers/mtd/Kconfig
 +++ b/drivers/mtd/Kconfig
-@@ -190,6 +190,13 @@
+@@ -190,6 +190,13 @@ config MTD_MYLOADER_PARTS
  	  You will still need the parsing functions to be called by the driver
  	  for your particular device. It won't happen automatically.
  
@@ -34,11 +32,9 @@ index a03ad29..debc887 100644
  comment "User Modules And Translation Layers"
  
  #
-diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
-index 99bb9a1..2a44a64 100644
 --- a/drivers/mtd/Makefile
 +++ b/drivers/mtd/Makefile
-@@ -16,6 +16,7 @@
+@@ -16,6 +16,7 @@ obj-$(CONFIG_MTD_AR7_PARTS)	+= ar7part.o
  obj-$(CONFIG_MTD_BCM63XX_PARTS)	+= bcm63xxpart.o
  obj-$(CONFIG_MTD_BCM47XX_PARTS)	+= bcm47xxpart.o
  obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
@@ -46,9 +42,6 @@ index 99bb9a1..2a44a64 100644
  
  # 'Users' - code which presents functionality to userspace.
  obj-$(CONFIG_MTD_BLKDEVS)	+= mtd_blkdevs.o
-diff --git a/drivers/mtd/qcom_smem_part.c b/drivers/mtd/qcom_smem_part.c
-new file mode 100644
-index 0000000..f9c1bca
 --- /dev/null
 +++ b/drivers/mtd/qcom_smem_part.c
 @@ -0,0 +1,228 @@
diff --git a/target/linux/ipq806x/patches-4.4/100-usb-phy-Add-Qualcomm-DWC3-HS-SS-PHY-drivers.patch b/target/linux/ipq806x/patches-4.4/100-usb-phy-Add-Qualcomm-DWC3-HS-SS-PHY-drivers.patch
index 68f2b39813..4bba0ac557 100644
--- a/target/linux/ipq806x/patches-4.4/100-usb-phy-Add-Qualcomm-DWC3-HS-SS-PHY-drivers.patch
+++ b/target/linux/ipq806x/patches-4.4/100-usb-phy-Add-Qualcomm-DWC3-HS-SS-PHY-drivers.patch
@@ -1,8 +1,8 @@
 --- a/drivers/phy/Kconfig
 +++ b/drivers/phy/Kconfig
-@@ -390,4 +390,15 @@
-	  Enable this to support the Broadcom Cygnus PCIe PHY.
-	  If unsure, say N.
+@@ -390,4 +390,15 @@ config PHY_CYGNUS_PCIE
+ 	  Enable this to support the Broadcom Cygnus PCIe PHY.
+ 	  If unsure, say N.
  
 +config PHY_QCOM_DWC3
 +	tristate "QCOM DWC3 USB PHY support"
@@ -18,7 +18,7 @@
  endmenu
 --- a/drivers/phy/Makefile
 +++ b/drivers/phy/Makefile
-@@ -48,3 +48,4 @@ obj-$(CONFIG_PHY_TUSB1210)	+=
+@@ -48,3 +48,4 @@ obj-$(CONFIG_PHY_TUSB1210)		+= phy-tusb1
  obj-$(CONFIG_PHY_BRCMSTB_SATA)		+= phy-brcmstb-sata.o
  obj-$(CONFIG_PHY_PISTACHIO_USB)		+= phy-pistachio-usb.o
  obj-$(CONFIG_PHY_CYGNUS_PCIE)		+= phy-bcm-cygnus-pcie.o
diff --git a/target/linux/ipq806x/patches-4.4/111-PCI-qcom-Add-Qualcomm-PCIe-controller-driver.patch b/target/linux/ipq806x/patches-4.4/111-PCI-qcom-Add-Qualcomm-PCIe-controller-driver.patch
index ad1a1b9cb3..4d907988fb 100644
--- a/target/linux/ipq806x/patches-4.4/111-PCI-qcom-Add-Qualcomm-PCIe-controller-driver.patch
+++ b/target/linux/ipq806x/patches-4.4/111-PCI-qcom-Add-Qualcomm-PCIe-controller-driver.patch
@@ -34,7 +34,7 @@ MAINTAINERS                  |    7 +
 
 --- a/MAINTAINERS
 +++ b/MAINTAINERS
-@@ -8253,6 +8253,13 @@
+@@ -8253,6 +8253,13 @@ S:	Maintained
  F:	Documentation/devicetree/bindings/pci/hisilicon-pcie.txt
  F:	drivers/pci/host/pcie-hisi.c
  
@@ -50,7 +50,7 @@ MAINTAINERS                  |    7 +
  L:	linux-pcmcia@lists.infradead.org
 --- a/drivers/pci/host/Kconfig
 +++ b/drivers/pci/host/Kconfig
-@@ -173,4 +173,13 @@
+@@ -173,4 +173,13 @@ config PCI_HISI
  	help
  	  Say Y here if you want PCIe controller support on HiSilicon HIP05 SoC
  
@@ -745,7 +745,7 @@ MAINTAINERS                  |    7 +
 +MODULE_ALIAS("platform:qcom-pcie");
 --- a/drivers/pci/host/Makefile
 +++ b/drivers/pci/host/Makefile
-@@ -20,3 +20,4 @@
+@@ -20,3 +20,4 @@ obj-$(CONFIG_PCIE_IPROC_BCMA) += pcie-ip
  obj-$(CONFIG_PCIE_ALTERA) += pcie-altera.o
  obj-$(CONFIG_PCIE_ALTERA_MSI) += pcie-altera-msi.o
  obj-$(CONFIG_PCI_HISI) += pcie-hisi.o
diff --git a/target/linux/ipq806x/patches-4.4/133-ARM-Add-Krait-L2-register-accessor-functions.patch b/target/linux/ipq806x/patches-4.4/133-ARM-Add-Krait-L2-register-accessor-functions.patch
index 01bd7497d1..36a92c858a 100644
--- a/target/linux/ipq806x/patches-4.4/133-ARM-Add-Krait-L2-register-accessor-functions.patch
+++ b/target/linux/ipq806x/patches-4.4/133-ARM-Add-Krait-L2-register-accessor-functions.patch
@@ -38,7 +38,7 @@ arch/arm/common/Kconfig                   |  3 ++
 
 --- a/arch/arm/common/Kconfig
 +++ b/arch/arm/common/Kconfig
-@@ -9,6 +9,9 @@
+@@ -9,6 +9,9 @@ config DMABOUNCE
  	bool
  	select ZONE_DMA
  
@@ -50,7 +50,7 @@ arch/arm/common/Kconfig                   |  3 ++
  
 --- a/arch/arm/common/Makefile
 +++ b/arch/arm/common/Makefile
-@@ -7,6 +7,7 @@
+@@ -7,6 +7,7 @@ obj-y				+= firmware.o
  obj-$(CONFIG_ICST)		+= icst.o
  obj-$(CONFIG_SA1111)		+= sa1111.o
  obj-$(CONFIG_DMABOUNCE)		+= dmabounce.o
diff --git a/target/linux/ipq806x/patches-4.4/134-clk-mux-Split-out-register-accessors-for-reuse.patch b/target/linux/ipq806x/patches-4.4/134-clk-mux-Split-out-register-accessors-for-reuse.patch
index acf5820e6c..6efa5d8045 100644
--- a/target/linux/ipq806x/patches-4.4/134-clk-mux-Split-out-register-accessors-for-reuse.patch
+++ b/target/linux/ipq806x/patches-4.4/134-clk-mux-Split-out-register-accessors-for-reuse.patch
@@ -18,8 +18,6 @@ Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
  include/linux/clk-provider.h |  9 ++++--
  2 files changed, 53 insertions(+), 30 deletions(-)
 
-diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
-index 7129c86..b03a34d 100644
 --- a/drivers/clk/clk-mux.c
 +++ b/drivers/clk/clk-mux.c
 @@ -28,35 +28,24 @@
@@ -64,7 +62,7 @@ index 7129c86..b03a34d 100644
  		val--;
  
  	if (val >= num_parents)
-@@ -64,24 +53,53 @@ static u8 clk_mux_get_parent(struct clk_hw *hw)
+@@ -64,24 +53,53 @@ static u8 clk_mux_get_parent(struct clk_
  
  	return val;
  }
@@ -127,7 +125,7 @@ index 7129c86..b03a34d 100644
  	if (mux->lock)
  		spin_lock_irqsave(mux->lock, flags);
  	else
-@@ -105,7 +123,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
+@@ -105,7 +123,7 @@ static int clk_mux_set_parent(struct clk
  }
  
  const struct clk_ops clk_mux_ops = {
@@ -136,7 +134,7 @@ index 7129c86..b03a34d 100644
  	.set_parent = clk_mux_set_parent,
  	.determine_rate = __clk_mux_determine_rate,
  };
-@@ -120,7 +138,7 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name,
+@@ -120,7 +138,7 @@ struct clk *clk_register_mux_table(struc
  		const char * const *parent_names, u8 num_parents,
  		unsigned long flags,
  		void __iomem *reg, u8 shift, u32 mask,
@@ -145,11 +143,9 @@ index 7129c86..b03a34d 100644
  {
  	struct clk_mux *mux;
  	struct clk *clk;
-diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
-index c56988a..b6b17b5 100644
 --- a/include/linux/clk-provider.h
 +++ b/include/linux/clk-provider.h
-@@ -432,7 +432,7 @@ void clk_unregister_divider(struct clk *clk);
+@@ -433,7 +433,7 @@ void clk_unregister_divider(struct clk *
  struct clk_mux {
  	struct clk_hw	hw;
  	void __iomem	*reg;
@@ -158,7 +154,7 @@ index c56988a..b6b17b5 100644
  	u32		mask;
  	u8		shift;
  	u8		flags;
-@@ -448,6 +448,11 @@ struct clk_mux {
+@@ -449,6 +449,11 @@ struct clk_mux {
  extern const struct clk_ops clk_mux_ops;
  extern const struct clk_ops clk_mux_ro_ops;
  
@@ -170,7 +166,7 @@ index c56988a..b6b17b5 100644
  struct clk *clk_register_mux(struct device *dev, const char *name,
  		const char * const *parent_names, u8 num_parents,
  		unsigned long flags,
-@@ -458,7 +463,7 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name,
+@@ -459,7 +464,7 @@ struct clk *clk_register_mux_table(struc
  		const char * const *parent_names, u8 num_parents,
  		unsigned long flags,
  		void __iomem *reg, u8 shift, u32 mask,
@@ -179,6 +175,3 @@ index c56988a..b6b17b5 100644
  
  void clk_unregister_mux(struct clk *clk);
  
--- 
-2.7.2
-
diff --git a/target/linux/ipq806x/patches-4.4/135-clk-Avoid-sending-high-rates-to-downstream-clocks-du.patch b/target/linux/ipq806x/patches-4.4/135-clk-Avoid-sending-high-rates-to-downstream-clocks-du.patch
index 5df0a5613e..5015d32d86 100644
--- a/target/linux/ipq806x/patches-4.4/135-clk-Avoid-sending-high-rates-to-downstream-clocks-du.patch
+++ b/target/linux/ipq806x/patches-4.4/135-clk-Avoid-sending-high-rates-to-downstream-clocks-du.patch
@@ -37,11 +37,9 @@ Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
  drivers/clk/clk.c | 34 ++++++++++++++++++++++------------
  1 file changed, 22 insertions(+), 12 deletions(-)
 
-diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
-index f13c3f4..8404c3c 100644
 --- a/drivers/clk/clk.c
 +++ b/drivers/clk/clk.c
-@@ -1427,21 +1427,24 @@ static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
+@@ -1427,21 +1427,24 @@ static struct clk_core *clk_propagate_ra
   * walk down a subtree and set the new rates notifying the rate
   * change on the way
   */
@@ -73,7 +71,7 @@ index f13c3f4..8404c3c 100644
  
  	if (core->new_parent && core->new_parent != core->parent) {
  		old_parent = __clk_set_parent_before(core, core->new_parent);
-@@ -1467,7 +1470,7 @@ static void clk_change_rate(struct clk_core *core)
+@@ -1467,7 +1470,7 @@ static void clk_change_rate(struct clk_c
  
  	trace_clk_set_rate_complete(core, core->new_rate);
  
@@ -82,7 +80,7 @@ index f13c3f4..8404c3c 100644
  
  	if (core->notifier_count && old_rate != core->rate)
  		__clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
-@@ -1483,12 +1486,13 @@ static void clk_change_rate(struct clk_core *core)
+@@ -1483,12 +1486,13 @@ static void clk_change_rate(struct clk_c
  		/* Skip children who will be reparented to another clock */
  		if (child->new_parent && child->new_parent != core)
  			continue;
@@ -99,7 +97,7 @@ index f13c3f4..8404c3c 100644
  }
  
  static int clk_core_set_rate_nolock(struct clk_core *core,
-@@ -1497,6 +1501,7 @@ static int clk_core_set_rate_nolock(struct clk_core *core,
+@@ -1497,6 +1501,7 @@ static int clk_core_set_rate_nolock(stru
  	struct clk_core *top, *fail_clk;
  	unsigned long rate = req_rate;
  	int ret = 0;
@@ -107,7 +105,7 @@ index f13c3f4..8404c3c 100644
  
  	if (!core)
  		return 0;
-@@ -1522,8 +1527,13 @@ static int clk_core_set_rate_nolock(struct clk_core *core,
+@@ -1522,8 +1527,13 @@ static int clk_core_set_rate_nolock(stru
  		return -EBUSY;
  	}
  
@@ -122,6 +120,3 @@ index f13c3f4..8404c3c 100644
  
  	core->req_rate = req_rate;
  
--- 
-2.7.2
-
diff --git a/target/linux/ipq806x/patches-4.4/136-clk-Add-safe-switch-hook.patch b/target/linux/ipq806x/patches-4.4/136-clk-Add-safe-switch-hook.patch
index e969f6bca4..de3ac7d14c 100644
--- a/target/linux/ipq806x/patches-4.4/136-clk-Add-safe-switch-hook.patch
+++ b/target/linux/ipq806x/patches-4.4/136-clk-Add-safe-switch-hook.patch
@@ -19,8 +19,6 @@ Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
  include/linux/clk-provider.h |  1 +
  2 files changed, 54 insertions(+), 8 deletions(-)
 
-diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
-index 8404c3c..a29319a 100644
 --- a/drivers/clk/clk.c
 +++ b/drivers/clk/clk.c
 @@ -51,9 +51,12 @@ struct clk_core {
@@ -46,7 +44,7 @@ index 8404c3c..a29319a 100644
  
  	core->new_rate = new_rate;
  	core->new_parent = new_parent;
-@@ -1281,6 +1285,18 @@ static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate,
+@@ -1281,6 +1285,18 @@ static void clk_calc_subtree(struct clk_
  	if (new_parent && new_parent != core->parent)
  		new_parent->new_child = core;
  
@@ -65,7 +63,7 @@ index 8404c3c..a29319a 100644
  	hlist_for_each_entry(child, &core->children, child_node) {
  		child->new_rate = clk_recalc(child, new_rate);
  		clk_calc_subtree(child, child->new_rate, NULL, 0);
-@@ -1393,14 +1409,43 @@ static struct clk_core *clk_propagate_rate_change(struct clk_core *core,
+@@ -1393,14 +1409,43 @@ static struct clk_core *clk_propagate_ra
  						  unsigned long event)
  {
  	struct clk_core *child, *tmp_clk, *fail_clk = NULL;
@@ -112,7 +110,7 @@ index 8404c3c..a29319a 100644
  			fail_clk = core;
  	}
  
-@@ -1446,7 +1491,8 @@ clk_change_rate(struct clk_core *core, unsigned long best_parent_rate)
+@@ -1446,7 +1491,8 @@ clk_change_rate(struct clk_core *core, u
  
  	old_rate = core->rate;
  
@@ -122,7 +120,7 @@ index 8404c3c..a29319a 100644
  		old_parent = __clk_set_parent_before(core, core->new_parent);
  		trace_clk_set_parent(core, core->new_parent);
  
-@@ -1472,9 +1518,6 @@ clk_change_rate(struct clk_core *core, unsigned long best_parent_rate)
+@@ -1472,9 +1518,6 @@ clk_change_rate(struct clk_core *core, u
  
  	core->rate = core->new_rate;
  
@@ -132,7 +130,7 @@ index 8404c3c..a29319a 100644
  	if (core->flags & CLK_RECALC_NEW_RATES)
  		(void)clk_calc_new_rates(core, core->new_rate);
  
-@@ -1537,6 +1580,8 @@ static int clk_core_set_rate_nolock(struct clk_core *core,
+@@ -1537,6 +1580,8 @@ static int clk_core_set_rate_nolock(stru
  
  	core->req_rate = req_rate;
  
@@ -141,8 +139,6 @@ index 8404c3c..a29319a 100644
  	return ret;
  }
  
-diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
-index b6b17b5..5d49262 100644
 --- a/include/linux/clk-provider.h
 +++ b/include/linux/clk-provider.h
 @@ -202,6 +202,7 @@ struct clk_ops {
@@ -153,6 +149,3 @@ index b6b17b5..5d49262 100644
  	int		(*set_rate)(struct clk_hw *hw, unsigned long rate,
  				    unsigned long parent_rate);
  	int		(*set_rate_and_parent)(struct clk_hw *hw,
--- 
-2.7.2
-
diff --git a/target/linux/ipq806x/patches-4.4/137-clk-qcom-Add-support-for-High-Frequency-PLLs-HFPLLs.patch b/target/linux/ipq806x/patches-4.4/137-clk-qcom-Add-support-for-High-Frequency-PLLs-HFPLLs.patch
index a1b1f4b1f7..4924e5ff4b 100644
--- a/target/linux/ipq806x/patches-4.4/137-clk-qcom-Add-support-for-High-Frequency-PLLs-HFPLLs.patch
+++ b/target/linux/ipq806x/patches-4.4/137-clk-qcom-Add-support-for-High-Frequency-PLLs-HFPLLs.patch
@@ -28,7 +28,7 @@ I'd really like to get rid of __clk_hfpll_init_once() if possible...
 
 --- a/drivers/clk/qcom/Makefile
 +++ b/drivers/clk/qcom/Makefile
-@@ -8,6 +8,7 @@
+@@ -8,6 +8,7 @@ clk-qcom-y += clk-rcg2.o
  clk-qcom-y += clk-branch.o
  clk-qcom-y += clk-regmap-divider.o
  clk-qcom-y += clk-regmap-mux.o
diff --git a/target/linux/ipq806x/patches-4.4/138-clk-qcom-Add-HFPLL-driver.patch b/target/linux/ipq806x/patches-4.4/138-clk-qcom-Add-HFPLL-driver.patch
index 5a452dbcbc..cc7c4cd177 100644
--- a/target/linux/ipq806x/patches-4.4/138-clk-qcom-Add-HFPLL-driver.patch
+++ b/target/linux/ipq806x/patches-4.4/138-clk-qcom-Add-HFPLL-driver.patch
@@ -73,7 +73,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +	};
 --- a/drivers/clk/qcom/Kconfig
 +++ b/drivers/clk/qcom/Kconfig
-@@ -106,3 +106,11 @@
+@@ -106,3 +106,11 @@ config MSM_MMCC_8974
  	  Support for the multimedia clock controller on msm8974 devices.
  	  Say Y if you want to support multimedia devices such as display,
  	  graphics, video encode/decode, camera, etc.
@@ -87,7 +87,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +	  such as MSM8974, APQ8084, etc.
 --- a/drivers/clk/qcom/Makefile
 +++ b/drivers/clk/qcom/Makefile
-@@ -23,3 +23,4 @@
+@@ -23,3 +23,4 @@ obj-$(CONFIG_MSM_LCC_8960) += lcc-msm896
  obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
  obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
  obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
diff --git a/target/linux/ipq806x/patches-4.4/139-clk-qcom-Add-IPQ806X-s-HFPLLs.patch b/target/linux/ipq806x/patches-4.4/139-clk-qcom-Add-IPQ806X-s-HFPLLs.patch
index 5b191b5597..a01decfd8b 100644
--- a/target/linux/ipq806x/patches-4.4/139-clk-qcom-Add-IPQ806X-s-HFPLLs.patch
+++ b/target/linux/ipq806x/patches-4.4/139-clk-qcom-Add-IPQ806X-s-HFPLLs.patch
@@ -29,7 +29,7 @@ drivers/clk/qcom/gcc-ipq806x.c | 83 ++++++++++++++++++++++++++++++++++++++++++
  #include "reset.h"
  
  static struct clk_pll pll0 = {
-@@ -113,6 +114,85 @@
+@@ -113,6 +114,85 @@ static struct clk_regmap pll8_vote = {
  	},
  };
  
@@ -115,7 +115,7 @@ drivers/clk/qcom/gcc-ipq806x.c | 83 ++++++++++++++++++++++++++++++++++++++++++
  static struct clk_pll pll14 = {
  	.l_reg = 0x31c4,
  	.m_reg = 0x31c8,
-@@ -2837,6 +2917,9 @@
+@@ -2837,6 +2917,9 @@ static struct clk_regmap *gcc_ipq806x_cl
  	[UBI32_CORE2_CLK_SRC] = &ubi32_core2_src_clk.clkr,
  	[NSSTCM_CLK_SRC] = &nss_tcm_src.clkr,
  	[NSSTCM_CLK] = &nss_tcm_clk.clkr,
diff --git a/target/linux/ipq806x/patches-4.4/140-clk-qcom-Add-support-for-Krait-clocks.patch b/target/linux/ipq806x/patches-4.4/140-clk-qcom-Add-support-for-Krait-clocks.patch
index 522482d841..ecf1ef589c 100644
--- a/target/linux/ipq806x/patches-4.4/140-clk-qcom-Add-support-for-Krait-clocks.patch
+++ b/target/linux/ipq806x/patches-4.4/140-clk-qcom-Add-support-for-Krait-clocks.patch
@@ -30,7 +30,7 @@ drivers/clk/qcom/Kconfig     |   4 ++
 
 --- a/drivers/clk/qcom/Kconfig
 +++ b/drivers/clk/qcom/Kconfig
-@@ -114,3 +114,7 @@
+@@ -114,3 +114,7 @@ config QCOM_HFPLL
  	  Support for the high-frequency PLLs present on Qualcomm devices.
  	  Say Y if you want to support CPU frequency scaling on devices
  	  such as MSM8974, APQ8084, etc.
@@ -40,7 +40,7 @@ drivers/clk/qcom/Kconfig     |   4 ++
 +	select KRAIT_L2_ACCESSORS
 --- a/drivers/clk/qcom/Makefile
 +++ b/drivers/clk/qcom/Makefile
-@@ -8,6 +8,7 @@
+@@ -8,6 +8,7 @@ clk-qcom-y += clk-rcg2.o
  clk-qcom-y += clk-branch.o
  clk-qcom-y += clk-regmap-divider.o
  clk-qcom-y += clk-regmap-mux.o
@@ -48,7 +48,6 @@ drivers/clk/qcom/Kconfig     |   4 ++
  clk-qcom-y += clk-hfpll.o
  clk-qcom-y += reset.o
  clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o
- 
 --- /dev/null
 +++ b/drivers/clk/qcom/clk-krait.c
 @@ -0,0 +1,166 @@
diff --git a/target/linux/ipq806x/patches-4.4/141-clk-qcom-Add-KPSS-ACC-GCC-driver.patch b/target/linux/ipq806x/patches-4.4/141-clk-qcom-Add-KPSS-ACC-GCC-driver.patch
index b2ddbc8a68..2b0bbb01a3 100644
--- a/target/linux/ipq806x/patches-4.4/141-clk-qcom-Add-KPSS-ACC-GCC-driver.patch
+++ b/target/linux/ipq806x/patches-4.4/141-clk-qcom-Add-KPSS-ACC-GCC-driver.patch
@@ -31,7 +31,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 
 --- a/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
 +++ b/Documentation/devicetree/bindings/arm/msm/qcom,kpss-acc.txt
-@@ -21,10 +21,17 @@
+@@ -21,10 +21,17 @@ PROPERTIES
  		    the register region. An optional second element specifies
  		    the base address and size of the alias register region.
  
@@ -82,7 +82,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +	};
 --- a/drivers/clk/qcom/Kconfig
 +++ b/drivers/clk/qcom/Kconfig
-@@ -115,6 +115,14 @@
+@@ -115,6 +115,14 @@ config QCOM_HFPLL
  	  Say Y if you want to support CPU frequency scaling on devices
  	  such as MSM8974, APQ8084, etc.
  
@@ -99,7 +99,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	select KRAIT_L2_ACCESSORS
 --- a/drivers/clk/qcom/Makefile
 +++ b/drivers/clk/qcom/Makefile
-@@ -9,6 +9,7 @@
+@@ -9,6 +9,7 @@ clk-qcom-y += clk-branch.o
  clk-qcom-y += clk-regmap-divider.o
  clk-qcom-y += clk-regmap-mux.o
  clk-qcom-$(CONFIG_KRAIT_CLOCKS) += clk-krait.o
diff --git a/target/linux/ipq806x/patches-4.4/142-clk-qcom-Add-Krait-clock-controller-driver.patch b/target/linux/ipq806x/patches-4.4/142-clk-qcom-Add-Krait-clock-controller-driver.patch
index f0e946781b..813366fdca 100644
--- a/target/linux/ipq806x/patches-4.4/142-clk-qcom-Add-Krait-clock-controller-driver.patch
+++ b/target/linux/ipq806x/patches-4.4/142-clk-qcom-Add-Krait-clock-controller-driver.patch
@@ -56,7 +56,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +	};
 --- a/drivers/clk/qcom/Kconfig
 +++ b/drivers/clk/qcom/Kconfig
-@@ -123,6 +123,14 @@
+@@ -123,6 +123,14 @@ config KPSS_XCC
  	  if you want to support CPU frequency scaling on devices such
  	  as MSM8960, APQ8064, etc.
  
@@ -73,7 +73,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	select KRAIT_L2_ACCESSORS
 --- a/drivers/clk/qcom/Makefile
 +++ b/drivers/clk/qcom/Makefile
-@@ -26,3 +26,4 @@
+@@ -26,3 +26,4 @@ obj-$(CONFIG_MSM_GCC_8974) += gcc-msm897
  obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
  obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
  obj-$(CONFIG_QCOM_HFPLL) += hfpll.o
diff --git a/target/linux/ipq806x/patches-4.4/143-cpufreq-Add-module-to-register-cpufreq-on-Krait-CPUs.patch b/target/linux/ipq806x/patches-4.4/143-cpufreq-Add-module-to-register-cpufreq-on-Krait-CPUs.patch
index d4c43f412a..e8d8ddf674 100644
--- a/target/linux/ipq806x/patches-4.4/143-cpufreq-Add-module-to-register-cpufreq-on-Krait-CPUs.patch
+++ b/target/linux/ipq806x/patches-4.4/143-cpufreq-Add-module-to-register-cpufreq-on-Krait-CPUs.patch
@@ -69,7 +69,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +	};
 --- a/drivers/cpufreq/Kconfig.arm
 +++ b/drivers/cpufreq/Kconfig.arm
-@@ -95,6 +95,15 @@
+@@ -95,6 +95,15 @@ config ARM_OMAP2PLUS_CPUFREQ
  	depends on ARCH_OMAP2PLUS
  	default ARCH_OMAP2PLUS
  
@@ -87,7 +87,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  	help
 --- a/drivers/cpufreq/Makefile
 +++ b/drivers/cpufreq/Makefile
-@@ -61,6 +61,7 @@
+@@ -61,6 +61,7 @@ obj-$(CONFIG_ARM_MT8173_CPUFREQ)	+= mt81
  obj-$(CONFIG_ARM_OMAP2PLUS_CPUFREQ)	+= omap-cpufreq.o
  obj-$(CONFIG_ARM_PXA2xx_CPUFREQ)	+= pxa2xx-cpufreq.o
  obj-$(CONFIG_PXA3xx)			+= pxa3xx-cpufreq.o
diff --git a/target/linux/ipq806x/patches-4.4/145-cpufreq-Add-a-cpufreq-krait-based-on-cpufre.patch b/target/linux/ipq806x/patches-4.4/145-cpufreq-Add-a-cpufreq-krait-based-on-cpufre.patch
index f33c9e0d8c..67770e8ce9 100644
--- a/target/linux/ipq806x/patches-4.4/145-cpufreq-Add-a-cpufreq-krait-based-on-cpufre.patch
+++ b/target/linux/ipq806x/patches-4.4/145-cpufreq-Add-a-cpufreq-krait-based-on-cpufre.patch
@@ -21,7 +21,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 
 --- a/drivers/cpufreq/Kconfig
 +++ b/drivers/cpufreq/Kconfig
-@@ -198,6 +198,19 @@
+@@ -198,6 +198,19 @@ config CPUFREQ_DT
  
  	  If in doubt, say N.
  
@@ -43,7 +43,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
  endif
 --- a/drivers/cpufreq/Makefile
 +++ b/drivers/cpufreq/Makefile
-@@ -13,6 +13,7 @@
+@@ -13,6 +13,7 @@ obj-$(CONFIG_CPU_FREQ_GOV_CONSERVATIVE)
  obj-$(CONFIG_CPU_FREQ_GOV_COMMON)		+= cpufreq_governor.o
  
  obj-$(CONFIG_CPUFREQ_DT)		+= cpufreq-dt.o
@@ -446,7 +446,7 @@ Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
 +MODULE_LICENSE("GPL v2");
 --- a/drivers/cpufreq/qcom-cpufreq.c
 +++ b/drivers/cpufreq/qcom-cpufreq.c
-@@ -168,11 +168,8 @@
+@@ -168,11 +168,8 @@ static int __init qcom_cpufreq_populate_
  
  static int __init qcom_cpufreq_driver_init(void)
  {
diff --git a/target/linux/ipq806x/patches-4.4/156-dmaengine-Add-ADM-driver.patch b/target/linux/ipq806x/patches-4.4/156-dmaengine-Add-ADM-driver.patch
index 805f28f323..02038aa942 100644
--- a/target/linux/ipq806x/patches-4.4/156-dmaengine-Add-ADM-driver.patch
+++ b/target/linux/ipq806x/patches-4.4/156-dmaengine-Add-ADM-driver.patch
@@ -35,7 +35,7 @@ drivers/dma/Kconfig    |   10 +
 
 --- a/drivers/dma/Kconfig
 +++ b/drivers/dma/Kconfig
-@@ -558,4 +558,14 @@
+@@ -558,4 +558,14 @@ config DMATEST
  config DMA_ENGINE_RAID
  	bool
  
@@ -955,7 +955,7 @@ drivers/dma/Kconfig    |   10 +
 +MODULE_LICENSE("GPL v2");
 --- a/drivers/dma/Makefile
 +++ b/drivers/dma/Makefile
-@@ -65,5 +65,6 @@
+@@ -65,5 +65,6 @@ obj-$(CONFIG_TI_DMA_CROSSBAR) += ti-dma-
  obj-$(CONFIG_TI_EDMA) += edma.o
  obj-$(CONFIG_XGENE_DMA) += xgene-dma.o
  obj-$(CONFIG_ZX_DMA) += zx296702_dma.o
diff --git a/target/linux/ipq806x/patches-4.4/161-mtd-nand-Create-a-BBT-flag-to-access-bad-block-markers-in-raw-mode.patch b/target/linux/ipq806x/patches-4.4/161-mtd-nand-Create-a-BBT-flag-to-access-bad-block-markers-in-raw-mode.patch
index 21fe405b90..154649dca6 100644
--- a/target/linux/ipq806x/patches-4.4/161-mtd-nand-Create-a-BBT-flag-to-access-bad-block-markers-in-raw-mode.patch
+++ b/target/linux/ipq806x/patches-4.4/161-mtd-nand-Create-a-BBT-flag-to-access-bad-block-markers-in-raw-mode.patch
@@ -38,7 +38,7 @@ drivers/mtd/nand/nand_base.c | 6 +++++-
 
 --- a/drivers/mtd/nand/nand_base.c
 +++ b/drivers/mtd/nand/nand_base.c
-@@ -394,7 +394,11 @@
+@@ -394,7 +394,11 @@ static int nand_default_block_markbad(st
  	} else {
  		ops.len = ops.ooblen = 1;
  	}
@@ -53,7 +53,7 @@ drivers/mtd/nand/nand_base.c | 6 +++++-
  	if (chip->bbt_options & NAND_BBT_SCANLASTPAGE)
 --- a/drivers/mtd/nand/nand_bbt.c
 +++ b/drivers/mtd/nand/nand_bbt.c
-@@ -420,7 +420,11 @@
+@@ -420,7 +420,11 @@ static int scan_block_fast(struct mtd_in
  	ops.oobbuf = buf;
  	ops.ooboffs = 0;
  	ops.datbuf = NULL;
@@ -68,7 +68,7 @@ drivers/mtd/nand/nand_base.c | 6 +++++-
  		/*
 --- a/include/linux/mtd/bbm.h
 +++ b/include/linux/mtd/bbm.h
-@@ -116,6 +116,12 @@
+@@ -116,6 +116,12 @@ struct nand_bbt_descr {
  #define NAND_BBT_NO_OOB_BBM	0x00080000
  
  /*
diff --git a/target/linux/ipq806x/patches-4.4/162-mtd-nand-Qualcomm-NAND-controller-driver.patch b/target/linux/ipq806x/patches-4.4/162-mtd-nand-Qualcomm-NAND-controller-driver.patch
index 19e5f91812..84ff6e74e0 100644
--- a/target/linux/ipq806x/patches-4.4/162-mtd-nand-Qualcomm-NAND-controller-driver.patch
+++ b/target/linux/ipq806x/patches-4.4/162-mtd-nand-Qualcomm-NAND-controller-driver.patch
@@ -80,7 +80,7 @@ drivers/mtd/nand/Kconfig      |    7 +
 
 --- a/drivers/mtd/nand/Kconfig
 +++ b/drivers/mtd/nand/Kconfig
-@@ -546,4 +546,11 @@
+@@ -546,4 +546,11 @@ config MTD_NAND_HISI504
  	help
  	  Enables support for NAND controller on Hisilicon SoC Hip04.
  
@@ -2015,7 +2015,7 @@ drivers/mtd/nand/Kconfig      |    7 +
 +MODULE_LICENSE("GPL v2");
 --- a/drivers/mtd/nand/Makefile
 +++ b/drivers/mtd/nand/Makefile
-@@ -55,5 +55,6 @@
+@@ -55,5 +55,6 @@ obj-$(CONFIG_MTD_NAND_BCM47XXNFLASH)	+=
  obj-$(CONFIG_MTD_NAND_SUNXI)		+= sunxi_nand.o
  obj-$(CONFIG_MTD_NAND_HISI504)	        += hisi504_nand.o
  obj-$(CONFIG_MTD_NAND_BRCMNAND)		+= brcmnand/
diff --git a/target/linux/ipq806x/patches-4.4/168-ARM-qcom-add-smb208-DT.patch b/target/linux/ipq806x/patches-4.4/168-ARM-qcom-add-smb208-DT.patch
index ef81ed2e55..0ad0508a9d 100644
--- a/target/linux/ipq806x/patches-4.4/168-ARM-qcom-add-smb208-DT.patch
+++ b/target/linux/ipq806x/patches-4.4/168-ARM-qcom-add-smb208-DT.patch
@@ -11,31 +11,31 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
 -			smb208_s1a: smb208-s1a {
 -				compatible = "qcom,rpm-smb208";
 -				reg = <QCOM_RPM_SMB208_S1a>;
--
--				regulator-min-microvolt = <1050000>;
--				regulator-max-microvolt = <1150000>;
 +			regulators {
 +				compatible = "qcom,rpm-smb208-regulators";
  
--				qcom,switch-mode-frequency = <1200000>;
--
--			};
+-				regulator-min-microvolt = <1050000>;
+-				regulator-max-microvolt = <1150000>;
 +				smb208_s1a: s1a {
 +					regulator-min-microvolt = <1050000>;
 +					regulator-max-microvolt = <1150000>;
  
+-				qcom,switch-mode-frequency = <1200000>;
++					qcom,switch-mode-frequency = <1200000>;
+ 
+-			};
+-
 -			smb208_s1b: smb208-s1b {
 -				compatible = "qcom,rpm-smb208";
 -				reg = <QCOM_RPM_SMB208_S1b>;
-+					qcom,switch-mode-frequency = <1200000>;
- 
+-
 -				regulator-min-microvolt = <1050000>;
 -				regulator-max-microvolt = <1150000>;
--
--				qcom,switch-mode-frequency = <1200000>;
--			};
 +				};
  
+-				qcom,switch-mode-frequency = <1200000>;
+-			};
+-
 -			smb208_s2a: smb208-s2a {
 -				compatible = "qcom,rpm-smb208";
 -				reg = <QCOM_RPM_SMB208_S2a>;
@@ -71,7 +71,7 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
 +				};
  			};
  		};
-
+ 
 --- a/arch/arm/boot/dts/qcom-ipq8065.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq8065.dtsi
 @@ -311,45 +311,37 @@
@@ -81,31 +81,31 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
 -			smb208_s1a: smb208-s1a {
 -				compatible = "qcom,rpm-smb208";
 -				reg = <QCOM_RPM_SMB208_S1a>;
--
--				regulator-min-microvolt = <1050000>;
--				regulator-max-microvolt = <1150000>;
 +			regulators {
 +				compatible = "qcom,rpm-smb208-regulators";
  
--				qcom,switch-mode-frequency = <1200000>;
--
--			};
+-				regulator-min-microvolt = <1050000>;
+-				regulator-max-microvolt = <1150000>;
 +				smb208_s1a: s1a {
 +					regulator-min-microvolt = <1050000>;
 +					regulator-max-microvolt = <1150000>;
  
+-				qcom,switch-mode-frequency = <1200000>;
++					qcom,switch-mode-frequency = <1200000>;
+ 
+-			};
+-
 -			smb208_s1b: smb208-s1b {
 -				compatible = "qcom,rpm-smb208";
 -				reg = <QCOM_RPM_SMB208_S1b>;
-+					qcom,switch-mode-frequency = <1200000>;
- 
+-
 -				regulator-min-microvolt = <1050000>;
 -				regulator-max-microvolt = <1150000>;
--
--				qcom,switch-mode-frequency = <1200000>;
--			};
 +				};
  
+-				qcom,switch-mode-frequency = <1200000>;
+-			};
+-
 -			smb208_s2a: smb208-s2a {
 -				compatible = "qcom,rpm-smb208";
 -				reg = <QCOM_RPM_SMB208_S2a>;
@@ -140,4 +140,5 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
 +					qcom,switch-mode-frequency = <1400000>;
 +				};
  			};
- 		};
+ 
+ 			cxo_clk: cxo-clk {
diff --git a/target/linux/ipq806x/patches-4.4/300-arch-arm-force-ZRELADDR-on-arch-qcom.patch b/target/linux/ipq806x/patches-4.4/300-arch-arm-force-ZRELADDR-on-arch-qcom.patch
index c0281ff070..35ba6fbb22 100644
--- a/target/linux/ipq806x/patches-4.4/300-arch-arm-force-ZRELADDR-on-arch-qcom.patch
+++ b/target/linux/ipq806x/patches-4.4/300-arch-arm-force-ZRELADDR-on-arch-qcom.patch
@@ -33,7 +33,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
 
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
-@@ -323,7 +323,7 @@
+@@ -324,7 +324,7 @@ config ARCH_MULTIPLATFORM
  	select ARCH_WANT_OPTIONAL_GPIOLIB
  	select ARM_HAS_SG_CHAIN
  	select ARM_PATCH_PHYS_VIRT
@@ -44,7 +44,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
  	select GENERIC_CLOCKEVENTS
 --- a/arch/arm/Makefile
 +++ b/arch/arm/Makefile
-@@ -256,9 +256,11 @@
+@@ -256,9 +256,11 @@ MACHINE  := arch/arm/mach-$(word 1,$(mac
  else
  MACHINE  :=
  endif
diff --git a/target/linux/ipq806x/patches-4.4/400-dsa-add-qca.patch b/target/linux/ipq806x/patches-4.4/400-dsa-add-qca.patch
index 9457e1d8ad..c369ab914a 100644
--- a/target/linux/ipq806x/patches-4.4/400-dsa-add-qca.patch
+++ b/target/linux/ipq806x/patches-4.4/400-dsa-add-qca.patch
@@ -40,24 +40,22 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
  create mode 100644 drivers/net/dsa/ar8xxx.c
  create mode 100644 drivers/net/dsa/ar8xxx.h
 
-diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig
-index 7ad0a4d..2aae541 100644
 --- a/drivers/net/dsa/Kconfig
 +++ b/drivers/net/dsa/Kconfig
-@@ -65,4 +65,11 @@ config NET_DSA_BCM_SF2
+@@ -65,4 +65,13 @@ config NET_DSA_BCM_SF2
  	  This enables support for the Broadcom Starfighter 2 Ethernet
  	  switch chips.
  
 +config NET_DSA_AR8XXX
 +	tristate "Qualcomm Atheros AR8XXX Ethernet switch family support"
 +	depends on NET_DSA
++	select NET_DSA_TAG_QCA
++	select REGMAP
 +	---help---
 +	  This enables support for the Qualcomm Atheros AR8XXX Ethernet
 +	  switch chips.
 +
  endmenu
-diff --git a/drivers/net/dsa/Makefile b/drivers/net/dsa/Makefile
-index e2d51c4..7647687 100644
 --- a/drivers/net/dsa/Makefile
 +++ b/drivers/net/dsa/Makefile
 @@ -14,3 +14,4 @@ ifdef CONFIG_NET_DSA_MV88E6171
@@ -65,12 +63,9 @@ index e2d51c4..7647687 100644
  endif
  obj-$(CONFIG_NET_DSA_BCM_SF2)	+= bcm_sf2.o
 +obj-$(CONFIG_NET_DSA_AR8XXX)	+= ar8xxx.o
-diff --git a/drivers/net/dsa/ar8xxx.c b/drivers/net/dsa/ar8xxx.c
-new file mode 100644
-index 0000000..4ce3ffc
 --- /dev/null
 +++ b/drivers/net/dsa/ar8xxx.c
-@@ -0,0 +1,303 @@
+@@ -0,0 +1,529 @@
 +/*
 + * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
 + * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
@@ -92,9 +87,59 @@ index 0000000..4ce3ffc
 +#include <net/dsa.h>
 +#include <linux/phy.h>
 +#include <linux/of_net.h>
++#include <linux/of_platform.h>
 +
 +#include "ar8xxx.h"
 +
++#define MIB_DESC(_s, _o, _n)	\
++	{			\
++		.size = (_s),	\
++		.offset = (_o),	\
++		.name = (_n),	\
++	}
++
++static const struct ar8xxx_mib_desc ar8327_mib[] = {
++	MIB_DESC(1, 0x00, "RxBroad"),
++	MIB_DESC(1, 0x04, "RxPause"),
++	MIB_DESC(1, 0x08, "RxMulti"),
++	MIB_DESC(1, 0x0c, "RxFcsErr"),
++	MIB_DESC(1, 0x10, "RxAlignErr"),
++	MIB_DESC(1, 0x14, "RxRunt"),
++	MIB_DESC(1, 0x18, "RxFragment"),
++	MIB_DESC(1, 0x1c, "Rx64Byte"),
++	MIB_DESC(1, 0x20, "Rx128Byte"),
++	MIB_DESC(1, 0x24, "Rx256Byte"),
++	MIB_DESC(1, 0x28, "Rx512Byte"),
++	MIB_DESC(1, 0x2c, "Rx1024Byte"),
++	MIB_DESC(1, 0x30, "Rx1518Byte"),
++	MIB_DESC(1, 0x34, "RxMaxByte"),
++	MIB_DESC(1, 0x38, "RxTooLong"),
++	MIB_DESC(2, 0x3c, "RxGoodByte"),
++	MIB_DESC(2, 0x44, "RxBadByte"),
++	MIB_DESC(1, 0x4c, "RxOverFlow"),
++	MIB_DESC(1, 0x50, "Filtered"),
++	MIB_DESC(1, 0x54, "TxBroad"),
++	MIB_DESC(1, 0x58, "TxPause"),
++	MIB_DESC(1, 0x5c, "TxMulti"),
++	MIB_DESC(1, 0x60, "TxUnderRun"),
++	MIB_DESC(1, 0x64, "Tx64Byte"),
++	MIB_DESC(1, 0x68, "Tx128Byte"),
++	MIB_DESC(1, 0x6c, "Tx256Byte"),
++	MIB_DESC(1, 0x70, "Tx512Byte"),
++	MIB_DESC(1, 0x74, "Tx1024Byte"),
++	MIB_DESC(1, 0x78, "Tx1518Byte"),
++	MIB_DESC(1, 0x7c, "TxMaxByte"),
++	MIB_DESC(1, 0x80, "TxOverSize"),
++	MIB_DESC(2, 0x84, "TxByte"),
++	MIB_DESC(1, 0x8c, "TxCollision"),
++	MIB_DESC(1, 0x90, "TxAbortCol"),
++	MIB_DESC(1, 0x94, "TxMultiCol"),
++	MIB_DESC(1, 0x98, "TxSingleCol"),
++	MIB_DESC(1, 0x9c, "TxExcDefer"),
++	MIB_DESC(1, 0xa0, "TxDefer"),
++	MIB_DESC(1, 0xa4, "TxLateCol"),
++};
++
 +u32
 +ar8xxx_mii_read32(struct mii_bus *bus, int phy_id, int regnum)
 +{
@@ -200,6 +245,57 @@ index 0000000..4ce3ffc
 +	}
 +}
 +
++static int ar8xxx_regmap_read(void *ctx, uint32_t reg, uint32_t *val)
++{
++	struct dsa_switch *ds = (struct dsa_switch *)ctx;
++
++	*val = ar8xxx_read(ds, reg);
++
++	return 0;
++}
++
++static int ar8xxx_regmap_write(void *ctx, uint32_t reg, uint32_t val)
++{
++	struct dsa_switch *ds = (struct dsa_switch *)ctx;
++
++	ar8xxx_write(ds, reg, val);
++
++	return 0;
++}
++
++static const struct regmap_range ar8xxx_readable_ranges[] = {
++	regmap_reg_range(0x0000, 0x00e4), /* Global control */
++	regmap_reg_range(0x0100, 0x0168), /* EEE control */
++	regmap_reg_range(0x0200, 0x0270), /* Parser control */
++	regmap_reg_range(0x0400, 0x0454), /* ACL */
++	regmap_reg_range(0x0600, 0x0718), /* Lookup */
++	regmap_reg_range(0x0800, 0x0b70), /* QM */
++	regmap_reg_range(0x0C00, 0x0c80), /* PKT */
++	regmap_reg_range(0x1000, 0x10ac), /* MIB - Port0 */
++	regmap_reg_range(0x1100, 0x11ac), /* MIB - Port1 */
++	regmap_reg_range(0x1200, 0x12ac), /* MIB - Port2 */
++	regmap_reg_range(0x1300, 0x13ac), /* MIB - Port3 */
++	regmap_reg_range(0x1400, 0x14ac), /* MIB - Port4 */
++	regmap_reg_range(0x1500, 0x15ac), /* MIB - Port5 */
++	regmap_reg_range(0x1600, 0x16ac), /* MIB - Port6 */
++
++};
++
++static struct regmap_access_table ar8xxx_readable_table = {
++	.yes_ranges = ar8xxx_readable_ranges,
++	.n_yes_ranges = ARRAY_SIZE(ar8xxx_readable_ranges),
++};
++
++struct regmap_config ar8xxx_regmap_config = {
++	.reg_bits = 16,
++	.val_bits = 32,
++	.reg_stride = 4,
++	.max_register = 0x16ac, /* end MIB - Port6 range */
++	.reg_read = ar8xxx_regmap_read,
++	.reg_write = ar8xxx_regmap_write,
++	.rd_table = &ar8xxx_readable_table,
++};
++
 +static int ar8xxx_set_pad_ctrl(struct dsa_switch *ds, int port, int mode)
 +{
 +	int reg;
@@ -233,6 +329,9 @@ index 0000000..4ce3ffc
 +		ar8xxx_write(ds, AR8327_REG_PORT5_PAD_CTRL,
 +			     AR8327_PORT_PAD_RGMII_RX_DELAY_EN);
 +		break;
++	case PHY_INTERFACE_MODE_SGMII:
++		ar8xxx_write(ds, reg, AR8327_PORT_PAD_SGMII_EN);
++		break;
 +	default:
 +		pr_err("xMII mode %d not supported\n", mode);
 +		return -EINVAL;
@@ -241,11 +340,61 @@ index 0000000..4ce3ffc
 +	return 0;
 +}
 +
++static int ar8xxx_of_setup(struct dsa_switch *ds)
++{
++	struct device_node *dn = ds->pd->of_node;
++	const char *s_phymode;
++	int ret, mode;
++	u32 phy_id, ctrl;
++
++	/* If port6-phy-mode property exists, configure it accordingly */
++	if (!of_property_read_string(dn, "qca,port6-phy-mode", &s_phymode)) {
++		for (mode = 0; mode < PHY_INTERFACE_MODE_MAX; mode++)
++			if (!strcasecmp(s_phymode, phy_modes(mode)))
++				break;
++
++		if (mode == PHY_INTERFACE_MODE_MAX)
++			pr_err("Unknown phy-mode: \"%s\"\n", s_phymode);
++
++		ret = ar8xxx_set_pad_ctrl(ds, 6, mode);
++		if (ret < 0)
++			return ret;
++	}
++
++	/* If a phy ID is specified for PORT6 mac, connect them together */
++	if (!of_property_read_u32(dn, "qca,port6-phy-id", &phy_id)) {
++		ar8xxx_rmw(ds, AR8327_PORT_LOOKUP_CTRL(6),
++			   AR8327_PORT_LOOKUP_MEMBER, BIT(phy_to_port(phy_id)));
++		ar8xxx_rmw(ds, AR8327_PORT_LOOKUP_CTRL(phy_to_port(phy_id)),
++			   AR8327_PORT_LOOKUP_MEMBER, BIT(6));
++
++		/* We want the switch to be pass-through and act like a PHY on
++		 * these ports. So BC/MC/UC & IGMP frames need to be accepted
++		 */
++		ctrl = BIT(phy_to_port(phy_id)) | BIT(6);
++		ar8xxx_reg_set(ds, AR8327_REG_GLOBAL_FW_CTRL1,
++			       ctrl << AR8327_GLOBAL_FW_CTRL1_IGMP_DP_S |
++			       ctrl << AR8327_GLOBAL_FW_CTRL1_BC_DP_S |
++			       ctrl << AR8327_GLOBAL_FW_CTRL1_MC_DP_S |
++			       ctrl << AR8327_GLOBAL_FW_CTRL1_UC_DP_S);
++	}
++
++	return 0;
++}
++
 +static int ar8xxx_setup(struct dsa_switch *ds)
 +{
++	struct ar8xxx_priv *priv = ds_to_priv(ds);
 +	struct net_device *netdev = ds->dst->pd->of_netdev;
 +	int ret, i, phy_mode;
 +
++	/* Start by setting up the register mapping */
++	priv->regmap = devm_regmap_init(ds->master_dev, NULL, ds,
++					&ar8xxx_regmap_config);
++
++	if (IS_ERR(priv->regmap))
++		pr_warn("regmap initialization failed");
++
 +	/* Initialize CPU port pad mode (xMII type, delays...) */
 +	phy_mode = of_get_phy_mode(netdev->dev.parent->of_node);
 +	if (phy_mode < 0) {
@@ -257,11 +406,31 @@ index 0000000..4ce3ffc
 +	if (ret < 0)
 +		return ret;
 +
++	/* Enable CPU Port */
++	ar8xxx_reg_set(ds, AR8327_REG_GLOBAL_FW_CTRL0,
++		       AR8327_GLOBAL_FW_CTRL0_CPU_PORT_EN);
++
++	/* Enable MIB counters */
++	ar8xxx_reg_set(ds, AR8327_REG_MIB, AR8327_MIB_CPU_KEEP);
++	ar8xxx_write(ds, AR8327_REG_MODULE_EN, AR8327_MODULE_EN_MIB);
++
++	/* Enable QCA header mode on Port 0 */
++	ar8xxx_write(ds, AR8327_REG_PORT_HDR_CTRL(0),
++		     AR8327_PORT_HDR_CTRL_ALL << AR8327_PORT_HDR_CTRL_TX_S |
++		     AR8327_PORT_HDR_CTRL_ALL << AR8327_PORT_HDR_CTRL_RX_S);
++
 +	/* Disable forwarding by default on all ports */
 +	for (i = 0; i < AR8327_NUM_PORTS; i++)
 +		ar8xxx_rmw(ds, AR8327_PORT_LOOKUP_CTRL(i),
 +			   AR8327_PORT_LOOKUP_MEMBER, 0);
 +
++	/* Forward all unknown frames to CPU port for Linux processing */
++	ar8xxx_write(ds, AR8327_REG_GLOBAL_FW_CTRL1,
++		     BIT(0) << AR8327_GLOBAL_FW_CTRL1_IGMP_DP_S |
++		     BIT(0) << AR8327_GLOBAL_FW_CTRL1_BC_DP_S |
++		     BIT(0) << AR8327_GLOBAL_FW_CTRL1_MC_DP_S |
++		     BIT(0) << AR8327_GLOBAL_FW_CTRL1_UC_DP_S);
++
 +	/* Setup connection between CPU ports & PHYs */
 +	for (i = 0; i < DSA_MAX_PORTS; i++) {
 +		/* CPU port gets connected to all PHYs in the switch */
@@ -273,11 +442,23 @@ index 0000000..4ce3ffc
 +
 +		/* Invividual PHYs gets connected to CPU port only */
 +		if (ds->phys_port_mask & BIT(i)) {
-+			ar8xxx_rmw(ds, AR8327_PORT_LOOKUP_CTRL(phy_to_port(i)),
++			int phy = phy_to_port(i);
++
++			ar8xxx_rmw(ds, AR8327_PORT_LOOKUP_CTRL(phy),
 +				   AR8327_PORT_LOOKUP_MEMBER, BIT(0));
++
++			/* Disable Auto-learning by default so the switch
++			 * doesn't try to forward the frame to another port
++			 */
++			ar8xxx_reg_clear(ds, AR8327_PORT_LOOKUP_CTRL(phy),
++					 AR8327_PORT_LOOKUP_LEARN);
 +		}
 +	}
 +
++	ret = ar8xxx_of_setup(ds);
++	if (ret < 0)
++		return ret;
++
 +	return 0;
 +}
 +
@@ -301,6 +482,42 @@ index 0000000..4ce3ffc
 +	return mdiobus_write(bus, phy, regnum, val);
 +}
 +
++static void ar8xxx_get_strings(struct dsa_switch *ds, int phy, uint8_t *data)
++{
++	int i;
++
++	for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++) {
++		strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name,
++			ETH_GSTRING_LEN);
++	}
++}
++
++static void ar8xxx_get_ethtool_stats(struct dsa_switch *ds, int phy,
++				     uint64_t *data)
++{
++	const struct ar8xxx_mib_desc *mib;
++	uint32_t reg, i, port;
++	u64 hi;
++
++	port = phy_to_port(phy);
++
++	for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++) {
++		mib = &ar8327_mib[i];
++		reg = AR8327_PORT_MIB_COUNTER(port) + mib->offset;
++
++		data[i] = ar8xxx_read(ds, reg);
++		if (mib->size == 2) {
++			hi = ar8xxx_read(ds, reg + 4);
++			data[i] |= hi << 32;
++		}
++	}
++}
++
++static int ar8xxx_get_sset_count(struct dsa_switch *ds)
++{
++	return ARRAY_SIZE(ar8327_mib);
++}
++
 +static void ar8xxx_poll_link(struct dsa_switch *ds)
 +{
 +	int i = 0;
@@ -348,13 +565,17 @@ index 0000000..4ce3ffc
 +}
 +
 +static struct dsa_switch_driver ar8xxx_switch_driver = {
-+	.tag_protocol	= DSA_TAG_PROTO_NONE,
-+	.probe		= ar8xxx_probe,
-+	.setup		= ar8xxx_setup,
-+	.set_addr	= ar8xxx_set_addr,
-+	.poll_link	= ar8xxx_poll_link,
-+	.phy_read	= ar8xxx_phy_read,
-+	.phy_write	= ar8xxx_phy_write,
++	.tag_protocol		= DSA_TAG_PROTO_QCA,
++	.priv_size		= sizeof(struct ar8xxx_priv),
++	.probe			= ar8xxx_probe,
++	.setup			= ar8xxx_setup,
++	.set_addr		= ar8xxx_set_addr,
++	.poll_link		= ar8xxx_poll_link,
++	.phy_read		= ar8xxx_phy_read,
++	.phy_write		= ar8xxx_phy_write,
++	.get_strings		= ar8xxx_get_strings,
++	.get_ethtool_stats	= ar8xxx_get_ethtool_stats,
++	.get_sset_count		= ar8xxx_get_sset_count,
 +};
 +
 +static int __init ar8xxx_init(void)
@@ -374,12 +595,9 @@ index 0000000..4ce3ffc
 +MODULE_DESCRIPTION("Driver for AR8XXX ethernet switch family");
 +MODULE_LICENSE("GPL");
 +MODULE_ALIAS("platform:ar8xxx");
-diff --git a/drivers/net/dsa/ar8xxx.h b/drivers/net/dsa/ar8xxx.h
-new file mode 100644
-index 0000000..a29b6d3
 --- /dev/null
 +++ b/drivers/net/dsa/ar8xxx.h
-@@ -0,0 +1,82 @@
+@@ -0,0 +1,156 @@
 +/*
 + * Copyright (C) 2009 Felix Fietkau <nbd@nbd.name>
 + * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
@@ -399,6 +617,17 @@ index 0000000..a29b6d3
 +#define __AR8XXX_H
 +
 +#include <linux/delay.h>
++#include <linux/regmap.h>
++
++struct ar8xxx_priv {
++	struct regmap *regmap;
++};
++
++struct ar8xxx_mib_desc {
++	unsigned int size;
++	unsigned int offset;
++	const char *name;
++};
 +
 +#define AR8327_NUM_PORTS		7
 +
@@ -413,6 +642,14 @@ index 0000000..a29b6d3
 +#define   AR8327_PORT_PAD_RGMII_RX_DELAY_EN	BIT(24)
 +#define   AR8327_PORT_PAD_SGMII_EN		BIT(7)
 +
++#define AR8327_REG_MODULE_EN			0x030
++#define   AR8327_MODULE_EN_MIB			BIT(0)
++#define	  AR8327_MODULE_EN_ACL			BIT(1)
++#define	  AR8327_MODULE_EN_L3			BIT(2)
++
++#define AR8327_REG_MIB				0x034
++#define   AR8327_MIB_CPU_KEEP			BIT(20)
++
 +#define AR8327_REG_PORT_STATUS(_i)		(0x07c + (_i) * 4)
 +#define   AR8XXX_PORT_STATUS_SPEED	GENMASK(2, 0)
 +#define   AR8XXX_PORT_STATUS_SPEED_S	0
@@ -425,6 +662,28 @@ index 0000000..a29b6d3
 +#define   AR8XXX_PORT_STATUS_LINK_AUTO	BIT(9)
 +#define   AR8XXX_PORT_STATUS_LINK_PAUSE	BIT(10)
 +
++#define AR8327_REG_PORT_HDR_CTRL(_i)		(0x9c + (_i * 4))
++#define   AR8327_PORT_HDR_CTRL_RX_MASK		GENMASK(3, 2)
++#define   AR8327_PORT_HDR_CTRL_RX_S		2
++#define   AR8327_PORT_HDR_CTRL_TX_MASK		GENMASK(1, 0)
++#define   AR8327_PORT_HDR_CTRL_TX_S		0
++#define   AR8327_PORT_HDR_CTRL_ALL		2
++#define   AR8327_PORT_HDR_CTRL_MGMT		1
++#define   AR8327_PORT_HDR_CTRL_NONE		0
++
++#define AR8327_REG_GLOBAL_FW_CTRL0		0x620
++#define   AR8327_GLOBAL_FW_CTRL0_CPU_PORT_EN	BIT(10)
++
++#define AR8327_REG_GLOBAL_FW_CTRL1		0x624
++#define   AR8327_GLOBAL_FW_CTRL1_IGMP_DP_MASK	GENMASK(30, 24)
++#define   AR8327_GLOBAL_FW_CTRL1_IGMP_DP_S	24
++#define   AR8327_GLOBAL_FW_CTRL1_BC_DP_MASK	GENMASK(22, 16)
++#define   AR8327_GLOBAL_FW_CTRL1_BC_DP_S	16
++#define   AR8327_GLOBAL_FW_CTRL1_MC_DP_MASK	GENMASK(14, 8)
++#define   AR8327_GLOBAL_FW_CTRL1_MC_DP_S	8
++#define   AR8327_GLOBAL_FW_CTRL1_UC_DP_MASK	GENMASK(6, 0)
++#define   AR8327_GLOBAL_FW_CTRL1_UC_DP_S	0
++
 +#define AR8327_PORT_LOOKUP_CTRL(_i)		(0x660 + (_i) * 0xc)
 +#define   AR8327_PORT_LOOKUP_MEMBER		GENMASK(6, 0)
 +#define   AR8327_PORT_LOOKUP_IN_MODE		GENMASK(9, 8)
@@ -434,6 +693,8 @@ index 0000000..a29b6d3
 +#define   AR8327_PORT_LOOKUP_LEARN		BIT(20)
 +#define   AR8327_PORT_LOOKUP_ING_MIRROR_EN	BIT(25)
 +
++#define AR8327_PORT_MIB_COUNTER(_i)		(0x1000 + (_i) * 0x100)
++
 +/* port speed */
 +enum {
 +	AR8XXX_PORT_SPEED_10M = 0,
@@ -442,251 +703,6 @@ index 0000000..a29b6d3
 +	AR8XXX_PORT_SPEED_ERR = 3,
 +};
 +
-+static inline void
-+split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
-+{
-+	regaddr >>= 1;
-+	*r1 = regaddr & 0x1e;
-+
-+	regaddr >>= 5;
-+	*r2 = regaddr & 0x7;
-+
-+	regaddr >>= 3;
-+	*page = regaddr & 0x1ff;
-+}
-+
-+static inline void
-+wait_for_page_switch(void)
-+{
-+	udelay(5);
-+}
-+
-+#endif /* __AR8XXX_H */
-diff --git a/net/dsa/dsa.c b/net/dsa/dsa.c
-index e6f6cc3..fffb9aa 100644
---- a/net/dsa/dsa.c
-+++ b/net/dsa/dsa.c
-@@ -893,6 +893,7 @@ static SIMPLE_DEV_PM_OPS(dsa_pm_ops, dsa_suspend, dsa_resume);
- 
- static const struct of_device_id dsa_of_match_table[] = {
- 	{ .compatible = "brcm,bcm7445-switch-v4.0" },
-+	{ .compatible = "qca,ar8xxx", },
- 	{ .compatible = "marvell,dsa", },
- 	{}
- };
-
-From patchwork Fri May 29 01:42:17 2015
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [2/7] net: dsa: ar8xxx: add ethtool hw statistics support
-From: Mathieu Olivari <mathieu@codeaurora.org>
-X-Patchwork-Id: 477524
-X-Patchwork-Delegate: davem@davemloft.net
-Message-Id: <1432863742-18427-3-git-send-email-mathieu@codeaurora.org>
-To: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
- ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
- davem@davemloft.net, mathieu@codeaurora.org, andrew@lunn.ch,
- f.fainelli@gmail.com, linux@roeck-us.net, gang.chen.5i5j@gmail.com,
- jiri@resnulli.us, leitec@staticky.com, fabf@skynet.be,
- alexander.h.duyck@intel.com, pavel.nakonechny@skitlab.ru,
- joe@perches.com, sfeldma@gmail.com, nbd@nbd.name, juhosg@openwrt.org
-Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
- netdev@vger.kernel.org
-Date: Thu, 28 May 2015 18:42:17 -0700
-
-MIB counters can now be reported through each switch port by using
-"ethtool -S".
-
-Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
----
- drivers/net/dsa/ar8xxx.c | 106 +++++++++++++++++++++++++++++++++++++++++++----
- drivers/net/dsa/ar8xxx.h |  47 +++++++++++++++++++++
- 2 files changed, 146 insertions(+), 7 deletions(-)
-
-diff --git a/drivers/net/dsa/ar8xxx.c b/drivers/net/dsa/ar8xxx.c
-index 4ce3ffc..2f0fa4d 100644
---- a/drivers/net/dsa/ar8xxx.c
-+++ b/drivers/net/dsa/ar8xxx.c
-@@ -22,6 +22,55 @@
- 
- #include "ar8xxx.h"
- 
-+#define MIB_DESC(_s, _o, _n)	\
-+	{			\
-+		.size = (_s),	\
-+		.offset = (_o),	\
-+		.name = (_n),	\
-+	}
-+
-+static const struct ar8xxx_mib_desc ar8327_mib[] = {
-+	MIB_DESC(1, 0x00, "RxBroad"),
-+	MIB_DESC(1, 0x04, "RxPause"),
-+	MIB_DESC(1, 0x08, "RxMulti"),
-+	MIB_DESC(1, 0x0c, "RxFcsErr"),
-+	MIB_DESC(1, 0x10, "RxAlignErr"),
-+	MIB_DESC(1, 0x14, "RxRunt"),
-+	MIB_DESC(1, 0x18, "RxFragment"),
-+	MIB_DESC(1, 0x1c, "Rx64Byte"),
-+	MIB_DESC(1, 0x20, "Rx128Byte"),
-+	MIB_DESC(1, 0x24, "Rx256Byte"),
-+	MIB_DESC(1, 0x28, "Rx512Byte"),
-+	MIB_DESC(1, 0x2c, "Rx1024Byte"),
-+	MIB_DESC(1, 0x30, "Rx1518Byte"),
-+	MIB_DESC(1, 0x34, "RxMaxByte"),
-+	MIB_DESC(1, 0x38, "RxTooLong"),
-+	MIB_DESC(2, 0x3c, "RxGoodByte"),
-+	MIB_DESC(2, 0x44, "RxBadByte"),
-+	MIB_DESC(1, 0x4c, "RxOverFlow"),
-+	MIB_DESC(1, 0x50, "Filtered"),
-+	MIB_DESC(1, 0x54, "TxBroad"),
-+	MIB_DESC(1, 0x58, "TxPause"),
-+	MIB_DESC(1, 0x5c, "TxMulti"),
-+	MIB_DESC(1, 0x60, "TxUnderRun"),
-+	MIB_DESC(1, 0x64, "Tx64Byte"),
-+	MIB_DESC(1, 0x68, "Tx128Byte"),
-+	MIB_DESC(1, 0x6c, "Tx256Byte"),
-+	MIB_DESC(1, 0x70, "Tx512Byte"),
-+	MIB_DESC(1, 0x74, "Tx1024Byte"),
-+	MIB_DESC(1, 0x78, "Tx1518Byte"),
-+	MIB_DESC(1, 0x7c, "TxMaxByte"),
-+	MIB_DESC(1, 0x80, "TxOverSize"),
-+	MIB_DESC(2, 0x84, "TxByte"),
-+	MIB_DESC(1, 0x8c, "TxCollision"),
-+	MIB_DESC(1, 0x90, "TxAbortCol"),
-+	MIB_DESC(1, 0x94, "TxMultiCol"),
-+	MIB_DESC(1, 0x98, "TxSingleCol"),
-+	MIB_DESC(1, 0x9c, "TxExcDefer"),
-+	MIB_DESC(1, 0xa0, "TxDefer"),
-+	MIB_DESC(1, 0xa4, "TxLateCol"),
-+};
-+
- u32
- ar8xxx_mii_read32(struct mii_bus *bus, int phy_id, int regnum)
- {
-@@ -184,6 +233,10 @@ static int ar8xxx_setup(struct dsa_switch *ds)
- 	if (ret < 0)
- 		return ret;
- 
-+	/* Enable MIB counters */
-+	ar8xxx_reg_set(ds, AR8327_REG_MIB, AR8327_MIB_CPU_KEEP);
-+	ar8xxx_write(ds, AR8327_REG_MODULE_EN, AR8327_MODULE_EN_MIB);
-+
- 	/* Disable forwarding by default on all ports */
- 	for (i = 0; i < AR8327_NUM_PORTS; i++)
- 		ar8xxx_rmw(ds, AR8327_PORT_LOOKUP_CTRL(i),
-@@ -228,6 +281,42 @@ ar8xxx_phy_write(struct dsa_switch *ds, int phy, int regnum, u16 val)
- 	return mdiobus_write(bus, phy, regnum, val);
- }
- 
-+static void ar8xxx_get_strings(struct dsa_switch *ds, int phy, uint8_t *data)
-+{
-+	int i;
-+
-+	for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++) {
-+		strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name,
-+			ETH_GSTRING_LEN);
-+	}
-+}
-+
-+static void ar8xxx_get_ethtool_stats(struct dsa_switch *ds, int phy,
-+				     uint64_t *data)
-+{
-+	const struct ar8xxx_mib_desc *mib;
-+	uint32_t reg, i, port;
-+	u64 hi;
-+
-+	port = phy_to_port(phy);
-+
-+	for (i = 0; i < ARRAY_SIZE(ar8327_mib); i++) {
-+		mib = &ar8327_mib[i];
-+		reg = AR8327_PORT_MIB_COUNTER(port) + mib->offset;
-+
-+		data[i] = ar8xxx_read(ds, reg);
-+		if (mib->size == 2) {
-+			hi = ar8xxx_read(ds, reg + 4);
-+			data[i] |= hi << 32;
-+		}
-+	}
-+}
-+
-+static int ar8xxx_get_sset_count(struct dsa_switch *ds)
-+{
-+	return ARRAY_SIZE(ar8327_mib);
-+}
-+
- static void ar8xxx_poll_link(struct dsa_switch *ds)
- {
- 	int i = 0;
-@@ -275,13 +364,16 @@ static void ar8xxx_poll_link(struct dsa_switch *ds)
- }
- 
- static struct dsa_switch_driver ar8xxx_switch_driver = {
--	.tag_protocol	= DSA_TAG_PROTO_NONE,
--	.probe		= ar8xxx_probe,
--	.setup		= ar8xxx_setup,
--	.set_addr	= ar8xxx_set_addr,
--	.poll_link	= ar8xxx_poll_link,
--	.phy_read	= ar8xxx_phy_read,
--	.phy_write	= ar8xxx_phy_write,
-+	.tag_protocol		= DSA_TAG_PROTO_NONE,
-+	.probe			= ar8xxx_probe,
-+	.setup			= ar8xxx_setup,
-+	.set_addr		= ar8xxx_set_addr,
-+	.poll_link		= ar8xxx_poll_link,
-+	.phy_read		= ar8xxx_phy_read,
-+	.phy_write		= ar8xxx_phy_write,
-+	.get_strings		= ar8xxx_get_strings,
-+	.get_ethtool_stats	= ar8xxx_get_ethtool_stats,
-+	.get_sset_count		= ar8xxx_get_sset_count,
- };
- 
- static int __init ar8xxx_init(void)
-diff --git a/drivers/net/dsa/ar8xxx.h b/drivers/net/dsa/ar8xxx.h
-index a29b6d3..7c7a125 100644
---- a/drivers/net/dsa/ar8xxx.h
-+++ b/drivers/net/dsa/ar8xxx.h
-@@ -18,6 +18,12 @@
- 
- #include <linux/delay.h>
- 
-+struct ar8xxx_mib_desc {
-+	unsigned int size;
-+	unsigned int offset;
-+	const char *name;
-+};
-+
- #define AR8327_NUM_PORTS		7
- 
- #define PHY_ID_QCA8337			0x004dd036
-@@ -31,6 +37,14 @@
- #define   AR8327_PORT_PAD_RGMII_RX_DELAY_EN	BIT(24)
- #define   AR8327_PORT_PAD_SGMII_EN		BIT(7)
- 
-+#define AR8327_REG_MODULE_EN			0x030
-+#define   AR8327_MODULE_EN_MIB			BIT(0)
-+#define	  AR8327_MODULE_EN_ACL			BIT(1)
-+#define	  AR8327_MODULE_EN_L3			BIT(2)
-+
-+#define AR8327_REG_MIB				0x034
-+#define   AR8327_MIB_CPU_KEEP			BIT(20)
-+
- #define AR8327_REG_PORT_STATUS(_i)		(0x07c + (_i) * 4)
- #define   AR8XXX_PORT_STATUS_SPEED	GENMASK(2, 0)
- #define   AR8XXX_PORT_STATUS_SPEED_S	0
-@@ -52,6 +66,8 @@
- #define   AR8327_PORT_LOOKUP_LEARN		BIT(20)
- #define   AR8327_PORT_LOOKUP_ING_MIRROR_EN	BIT(25)
- 
-+#define AR8327_PORT_MIB_COUNTER(_i)		(0x1000 + (_i) * 0x100)
-+
- /* port speed */
- enum {
- 	AR8XXX_PORT_SPEED_10M = 0,
-@@ -60,6 +76,25 @@ enum {
- 	AR8XXX_PORT_SPEED_ERR = 3,
- };
- 
 +static inline int port_to_phy(int port)
 +{
 +	if (port >= 1 && port <= 6)
@@ -706,215 +722,60 @@ index a29b6d3..7c7a125 100644
 +u32
 +ar8xxx_rmw(struct dsa_switch *ds, int reg, u32 mask, u32 val);
 +
- static inline void
- split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
- {
-@@ -79,4 +114,16 @@ wait_for_page_switch(void)
- 	udelay(5);
- }
- 
 +static inline void
-+ar8xxx_reg_set(struct dsa_switch *ds, int reg, u32 val)
++split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
 +{
-+	ar8xxx_rmw(ds, reg, 0, val);
++	regaddr >>= 1;
++	*r1 = regaddr & 0x1e;
++
++	regaddr >>= 5;
++	*r2 = regaddr & 0x7;
++
++	regaddr >>= 3;
++	*page = regaddr & 0x1ff;
 +}
 +
 +static inline void
-+ar8xxx_reg_clear(struct dsa_switch *ds, int reg, u32 val)
++wait_for_page_switch(void)
 +{
-+	ar8xxx_rmw(ds, reg, val, 0);
++	udelay(5);
 +}
 +
- #endif /* __AR8XXX_H */
-
-From patchwork Fri May 29 01:42:18 2015
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [3/7] net: dsa: ar8xxx: add regmap support
-From: Mathieu Olivari <mathieu@codeaurora.org>
-X-Patchwork-Id: 477522
-X-Patchwork-Delegate: davem@davemloft.net
-Message-Id: <1432863742-18427-4-git-send-email-mathieu@codeaurora.org>
-To: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
- ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
- davem@davemloft.net, mathieu@codeaurora.org, andrew@lunn.ch,
- f.fainelli@gmail.com, linux@roeck-us.net, gang.chen.5i5j@gmail.com,
- jiri@resnulli.us, leitec@staticky.com, fabf@skynet.be,
- alexander.h.duyck@intel.com, pavel.nakonechny@skitlab.ru,
- joe@perches.com, sfeldma@gmail.com, nbd@nbd.name, juhosg@openwrt.org
-Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
- netdev@vger.kernel.org
-Date: Thu, 28 May 2015 18:42:18 -0700
-
-All switch registers can now be dumped using regmap/debugfs.
-
-\# cat /sys/kernel/debug/regmap/<mdiobus>/registers
-0000: 00001302
-0004: ...
-...
-
-Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
----
- drivers/net/dsa/Kconfig  |  1 +
- drivers/net/dsa/ar8xxx.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++++
- drivers/net/dsa/ar8xxx.h |  5 ++++
- 3 files changed, 66 insertions(+)
-
-diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig
-index 2aae541..17fb296 100644
---- a/drivers/net/dsa/Kconfig
-+++ b/drivers/net/dsa/Kconfig
-@@ -68,6 +68,7 @@ config NET_DSA_BCM_SF2
- config NET_DSA_AR8XXX
- 	tristate "Qualcomm Atheros AR8XXX Ethernet switch family support"
- 	depends on NET_DSA
-+	select REGMAP
- 	---help---
- 	  This enables support for the Qualcomm Atheros AR8XXX Ethernet
- 	  switch chips.
-diff --git a/drivers/net/dsa/ar8xxx.c b/drivers/net/dsa/ar8xxx.c
-index 2f0fa4d..327abd4 100644
---- a/drivers/net/dsa/ar8xxx.c
-+++ b/drivers/net/dsa/ar8xxx.c
-@@ -176,6 +176,57 @@ static char *ar8xxx_probe(struct device *host_dev, int sw_addr)
- 	}
- }
- 
-+static int ar8xxx_regmap_read(void *ctx, uint32_t reg, uint32_t *val)
++static inline void
++ar8xxx_reg_set(struct dsa_switch *ds, int reg, u32 val)
 +{
-+	struct dsa_switch *ds = (struct dsa_switch *)ctx;
-+
-+	*val = ar8xxx_read(ds, reg);
-+
-+	return 0;
++	ar8xxx_rmw(ds, reg, 0, val);
 +}
 +
-+static int ar8xxx_regmap_write(void *ctx, uint32_t reg, uint32_t val)
++static inline void
++ar8xxx_reg_clear(struct dsa_switch *ds, int reg, u32 val)
 +{
-+	struct dsa_switch *ds = (struct dsa_switch *)ctx;
-+
-+	ar8xxx_write(ds, reg, val);
-+
-+	return 0;
++	ar8xxx_rmw(ds, reg, val, 0);
 +}
 +
-+static const struct regmap_range ar8xxx_readable_ranges[] = {
-+	regmap_reg_range(0x0000, 0x00e4), /* Global control */
-+	regmap_reg_range(0x0100, 0x0168), /* EEE control */
-+	regmap_reg_range(0x0200, 0x0270), /* Parser control */
-+	regmap_reg_range(0x0400, 0x0454), /* ACL */
-+	regmap_reg_range(0x0600, 0x0718), /* Lookup */
-+	regmap_reg_range(0x0800, 0x0b70), /* QM */
-+	regmap_reg_range(0x0C00, 0x0c80), /* PKT */
-+	regmap_reg_range(0x1000, 0x10ac), /* MIB - Port0 */
-+	regmap_reg_range(0x1100, 0x11ac), /* MIB - Port1 */
-+	regmap_reg_range(0x1200, 0x12ac), /* MIB - Port2 */
-+	regmap_reg_range(0x1300, 0x13ac), /* MIB - Port3 */
-+	regmap_reg_range(0x1400, 0x14ac), /* MIB - Port4 */
-+	regmap_reg_range(0x1500, 0x15ac), /* MIB - Port5 */
-+	regmap_reg_range(0x1600, 0x16ac), /* MIB - Port6 */
-+
-+};
-+
-+static struct regmap_access_table ar8xxx_readable_table = {
-+	.yes_ranges = ar8xxx_readable_ranges,
-+	.n_yes_ranges = ARRAY_SIZE(ar8xxx_readable_ranges),
-+};
-+
-+struct regmap_config ar8xxx_regmap_config = {
-+	.reg_bits = 16,
-+	.val_bits = 32,
-+	.reg_stride = 4,
-+	.max_register = 0x16ac, /* end MIB - Port6 range */
-+	.reg_read = ar8xxx_regmap_read,
-+	.reg_write = ar8xxx_regmap_write,
-+	.rd_table = &ar8xxx_readable_table,
-+};
-+
- static int ar8xxx_set_pad_ctrl(struct dsa_switch *ds, int port, int mode)
- {
- 	int reg;
-@@ -219,9 +270,17 @@ static int ar8xxx_set_pad_ctrl(struct dsa_switch *ds, int port, int mode)
- 
- static int ar8xxx_setup(struct dsa_switch *ds)
- {
-+	struct ar8xxx_priv *priv = ds_to_priv(ds);
- 	struct net_device *netdev = ds->dst->pd->of_netdev;
- 	int ret, i, phy_mode;
- 
-+	/* Start by setting up the register mapping */
-+	priv->regmap = devm_regmap_init(ds->master_dev, NULL, ds,
-+					&ar8xxx_regmap_config);
-+
-+	if (IS_ERR(priv->regmap))
-+		pr_warn("regmap initialization failed");
-+
- 	/* Initialize CPU port pad mode (xMII type, delays...) */
- 	phy_mode = of_get_phy_mode(netdev->dev.parent->of_node);
- 	if (phy_mode < 0) {
-@@ -365,6 +424,7 @@ static void ar8xxx_poll_link(struct dsa_switch *ds)
- 
- static struct dsa_switch_driver ar8xxx_switch_driver = {
- 	.tag_protocol		= DSA_TAG_PROTO_NONE,
-+	.priv_size		= sizeof(struct ar8xxx_priv),
- 	.probe			= ar8xxx_probe,
- 	.setup			= ar8xxx_setup,
- 	.set_addr		= ar8xxx_set_addr,
-diff --git a/drivers/net/dsa/ar8xxx.h b/drivers/net/dsa/ar8xxx.h
-index 7c7a125..98cc7ed 100644
---- a/drivers/net/dsa/ar8xxx.h
-+++ b/drivers/net/dsa/ar8xxx.h
-@@ -17,6 +17,11 @@
- #define __AR8XXX_H
- 
- #include <linux/delay.h>
-+#include <linux/regmap.h>
-+
-+struct ar8xxx_priv {
-+	struct regmap *regmap;
-+};
++#endif /* __AR8XXX_H */
+--- a/net/dsa/dsa.c
++++ b/net/dsa/dsa.c
+@@ -285,6 +285,11 @@ static int dsa_switch_setup_one(struct d
+ 			dst->rcv = brcm_netdev_ops.rcv;
+ 			break;
+ #endif
++#ifdef CONFIG_NET_DSA_TAG_QCA
++		case DSA_TAG_PROTO_QCA:
++			dst->rcv = qca_netdev_ops.rcv;
++			break;
++#endif
+ 		case DSA_TAG_PROTO_NONE:
+ 			break;
+ 		default:
+@@ -1041,6 +1046,7 @@ static SIMPLE_DEV_PM_OPS(dsa_pm_ops, dsa
  
- struct ar8xxx_mib_desc {
- 	unsigned int size;
-
-From patchwork Fri May 29 01:42:19 2015
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [4/7] net: dsa: add QCA tag support
-From: Mathieu Olivari <mathieu@codeaurora.org>
-X-Patchwork-Id: 477521
-X-Patchwork-Delegate: davem@davemloft.net
-Message-Id: <1432863742-18427-5-git-send-email-mathieu@codeaurora.org>
-To: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
- ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
- davem@davemloft.net, mathieu@codeaurora.org, andrew@lunn.ch,
- f.fainelli@gmail.com, linux@roeck-us.net, gang.chen.5i5j@gmail.com,
- jiri@resnulli.us, leitec@staticky.com, fabf@skynet.be,
- alexander.h.duyck@intel.com, pavel.nakonechny@skitlab.ru,
- joe@perches.com, sfeldma@gmail.com, nbd@nbd.name, juhosg@openwrt.org
-Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
- netdev@vger.kernel.org
-Date: Thu, 28 May 2015 18:42:19 -0700
-
-QCA tags are used on QCA ar8xxx switch family. This change adds support
-for encap/decap using 2 bytes header mode.
-
-Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
----
- include/net/dsa.h  |   1 +
- net/dsa/Kconfig    |   3 +
- net/dsa/Makefile   |   1 +
- net/dsa/dsa.c      |   5 ++
- net/dsa/dsa_priv.h |   2 +
- net/dsa/slave.c    |   5 ++
- net/dsa/tag_qca.c  | 158 +++++++++++++++++++++++++++++++++++++++++++++++++++++
- 7 files changed, 175 insertions(+)
- create mode 100644 net/dsa/tag_qca.c
-
-diff --git a/include/net/dsa.h b/include/net/dsa.h
-index fbca63b..64ddf6f 100644
+ static const struct of_device_id dsa_of_match_table[] = {
+ 	{ .compatible = "brcm,bcm7445-switch-v4.0" },
++	{ .compatible = "qca,ar8xxx", },
+ 	{ .compatible = "marvell,dsa", },
+ 	{}
+ };
 --- a/include/net/dsa.h
 +++ b/include/net/dsa.h
 @@ -26,6 +26,7 @@ enum dsa_tag_protocol {
@@ -925,8 +786,6 @@ index fbca63b..64ddf6f 100644
  };
  
  #define DSA_MAX_SWITCHES	4
-diff --git a/net/dsa/Kconfig b/net/dsa/Kconfig
-index ff7736f..4f3cce1 100644
 --- a/net/dsa/Kconfig
 +++ b/net/dsa/Kconfig
 @@ -26,6 +26,9 @@ config NET_DSA_HWMON
@@ -939,8 +798,6 @@ index ff7736f..4f3cce1 100644
  config NET_DSA_TAG_BRCM
  	bool
  
-diff --git a/net/dsa/Makefile b/net/dsa/Makefile
-index da06ed1..9feb86c 100644
 --- a/net/dsa/Makefile
 +++ b/net/dsa/Makefile
 @@ -3,6 +3,7 @@ obj-$(CONFIG_NET_DSA) += dsa_core.o
@@ -951,27 +808,9 @@ index da06ed1..9feb86c 100644
  dsa_core-$(CONFIG_NET_DSA_TAG_BRCM) += tag_brcm.o
  dsa_core-$(CONFIG_NET_DSA_TAG_DSA) += tag_dsa.o
  dsa_core-$(CONFIG_NET_DSA_TAG_EDSA) += tag_edsa.o
-diff --git a/net/dsa/dsa.c b/net/dsa/dsa.c
-index fffb9aa..6010a7d 100644
---- a/net/dsa/dsa.c
-+++ b/net/dsa/dsa.c
-@@ -249,6 +249,11 @@ static int dsa_switch_setup_one(struct dsa_switch *ds, struct device *parent)
- 			dst->rcv = brcm_netdev_ops.rcv;
- 			break;
- #endif
-+#ifdef CONFIG_NET_DSA_TAG_QCA
-+		case DSA_TAG_PROTO_QCA:
-+			dst->rcv = qca_netdev_ops.rcv;
-+			break;
-+#endif
- 		case DSA_TAG_PROTO_NONE:
- 			break;
- 		default:
-diff --git a/net/dsa/dsa_priv.h b/net/dsa/dsa_priv.h
-index d5f1f9b..350c94b 100644
 --- a/net/dsa/dsa_priv.h
 +++ b/net/dsa/dsa_priv.h
-@@ -74,5 +74,7 @@ extern const struct dsa_device_ops trailer_netdev_ops;
+@@ -78,5 +78,7 @@ extern const struct dsa_device_ops trail
  /* tag_brcm.c */
  extern const struct dsa_device_ops brcm_netdev_ops;
  
@@ -979,11 +818,9 @@ index d5f1f9b..350c94b 100644
 +extern const struct dsa_device_ops qca_netdev_ops;
  
  #endif
-diff --git a/net/dsa/slave.c b/net/dsa/slave.c
-index 04ffad3..cd8f552 100644
 --- a/net/dsa/slave.c
 +++ b/net/dsa/slave.c
-@@ -925,6 +925,11 @@ int dsa_slave_create(struct dsa_switch *ds, struct device *parent,
+@@ -1180,6 +1180,11 @@ int dsa_slave_create(struct dsa_switch *
  		p->xmit = brcm_netdev_ops.xmit;
  		break;
  #endif
@@ -995,9 +832,6 @@ index 04ffad3..cd8f552 100644
  	default:
  		p->xmit	= dsa_slave_notag_xmit;
  		break;
-diff --git a/net/dsa/tag_qca.c b/net/dsa/tag_qca.c
-new file mode 100644
-index 0000000..8f02196
 --- /dev/null
 +++ b/net/dsa/tag_qca.c
 @@ -0,0 +1,158 @@
@@ -1159,293 +993,6 @@ index 0000000..8f02196
 +	.xmit	= qca_tag_xmit,
 +	.rcv	= qca_tag_rcv,
 +};
-
-From patchwork Fri May 29 01:42:20 2015
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [5/7] net: dsa: ar8xxx: enable QCA header support on AR8xxx
-From: Mathieu Olivari <mathieu@codeaurora.org>
-X-Patchwork-Id: 477527
-X-Patchwork-Delegate: davem@davemloft.net
-Message-Id: <1432863742-18427-6-git-send-email-mathieu@codeaurora.org>
-To: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
- ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
- davem@davemloft.net, mathieu@codeaurora.org, andrew@lunn.ch,
- f.fainelli@gmail.com, linux@roeck-us.net, gang.chen.5i5j@gmail.com,
- jiri@resnulli.us, leitec@staticky.com, fabf@skynet.be,
- alexander.h.duyck@intel.com, pavel.nakonechny@skitlab.ru,
- joe@perches.com, sfeldma@gmail.com, nbd@nbd.name, juhosg@openwrt.org
-Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
- netdev@vger.kernel.org
-Date: Thu, 28 May 2015 18:42:20 -0700
-
-This change enable support for the QCA headers in QCA83337 driver.
-A 2 bytes header will be added by the switch on every incoming packet
-to identify the ingress port, and the DSA tagging code will add a
-similar 2 bytes header to control which port is used to send a
-particular packet.
-
-Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
----
- drivers/net/dsa/Kconfig  |  1 +
- drivers/net/dsa/ar8xxx.c | 28 ++++++++++++++++++++++++++--
- drivers/net/dsa/ar8xxx.h | 22 ++++++++++++++++++++++
- 3 files changed, 49 insertions(+), 2 deletions(-)
-
-diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig
-index 17fb296..fa8b484 100644
---- a/drivers/net/dsa/Kconfig
-+++ b/drivers/net/dsa/Kconfig
-@@ -68,6 +68,7 @@ config NET_DSA_BCM_SF2
- config NET_DSA_AR8XXX
- 	tristate "Qualcomm Atheros AR8XXX Ethernet switch family support"
- 	depends on NET_DSA
-+	select NET_DSA_TAG_QCA
- 	select REGMAP
- 	---help---
- 	  This enables support for the Qualcomm Atheros AR8XXX Ethernet
-diff --git a/drivers/net/dsa/ar8xxx.c b/drivers/net/dsa/ar8xxx.c
-index 327abd4..4044614 100644
---- a/drivers/net/dsa/ar8xxx.c
-+++ b/drivers/net/dsa/ar8xxx.c
-@@ -292,15 +292,31 @@ static int ar8xxx_setup(struct dsa_switch *ds)
- 	if (ret < 0)
- 		return ret;
- 
-+	/* Enable CPU Port */
-+	ar8xxx_reg_set(ds, AR8327_REG_GLOBAL_FW_CTRL0,
-+		       AR8327_GLOBAL_FW_CTRL0_CPU_PORT_EN);
-+
- 	/* Enable MIB counters */
- 	ar8xxx_reg_set(ds, AR8327_REG_MIB, AR8327_MIB_CPU_KEEP);
- 	ar8xxx_write(ds, AR8327_REG_MODULE_EN, AR8327_MODULE_EN_MIB);
- 
-+	/* Enable QCA header mode on Port 0 */
-+	ar8xxx_write(ds, AR8327_REG_PORT_HDR_CTRL(0),
-+		     AR8327_PORT_HDR_CTRL_ALL << AR8327_PORT_HDR_CTRL_TX_S |
-+		     AR8327_PORT_HDR_CTRL_ALL << AR8327_PORT_HDR_CTRL_RX_S);
-+
- 	/* Disable forwarding by default on all ports */
- 	for (i = 0; i < AR8327_NUM_PORTS; i++)
- 		ar8xxx_rmw(ds, AR8327_PORT_LOOKUP_CTRL(i),
- 			   AR8327_PORT_LOOKUP_MEMBER, 0);
- 
-+	/* Forward all unknown frames to CPU port for Linux processing */
-+	ar8xxx_write(ds, AR8327_REG_GLOBAL_FW_CTRL1,
-+		     BIT(0) << AR8327_GLOBAL_FW_CTRL1_IGMP_DP_S |
-+		     BIT(0) << AR8327_GLOBAL_FW_CTRL1_BC_DP_S |
-+		     BIT(0) << AR8327_GLOBAL_FW_CTRL1_MC_DP_S |
-+		     BIT(0) << AR8327_GLOBAL_FW_CTRL1_UC_DP_S);
-+
- 	/* Setup connection between CPU ports & PHYs */
- 	for (i = 0; i < DSA_MAX_PORTS; i++) {
- 		/* CPU port gets connected to all PHYs in the switch */
-@@ -312,8 +328,16 @@ static int ar8xxx_setup(struct dsa_switch *ds)
- 
- 		/* Invividual PHYs gets connected to CPU port only */
- 		if (ds->phys_port_mask & BIT(i)) {
--			ar8xxx_rmw(ds, AR8327_PORT_LOOKUP_CTRL(phy_to_port(i)),
-+			int phy = phy_to_port(i);
-+
-+			ar8xxx_rmw(ds, AR8327_PORT_LOOKUP_CTRL(phy),
- 				   AR8327_PORT_LOOKUP_MEMBER, BIT(0));
-+
-+			/* Disable Auto-learning by default so the switch
-+			 * doesn't try to forward the frame to another port
-+			 */
-+			ar8xxx_reg_clear(ds, AR8327_PORT_LOOKUP_CTRL(phy),
-+					 AR8327_PORT_LOOKUP_LEARN);
- 		}
- 	}
- 
-@@ -423,7 +447,7 @@ static void ar8xxx_poll_link(struct dsa_switch *ds)
- }
- 
- static struct dsa_switch_driver ar8xxx_switch_driver = {
--	.tag_protocol		= DSA_TAG_PROTO_NONE,
-+	.tag_protocol		= DSA_TAG_PROTO_QCA,
- 	.priv_size		= sizeof(struct ar8xxx_priv),
- 	.probe			= ar8xxx_probe,
- 	.setup			= ar8xxx_setup,
-diff --git a/drivers/net/dsa/ar8xxx.h b/drivers/net/dsa/ar8xxx.h
-index 98cc7ed..e68b92a 100644
---- a/drivers/net/dsa/ar8xxx.h
-+++ b/drivers/net/dsa/ar8xxx.h
-@@ -62,6 +62,28 @@ struct ar8xxx_mib_desc {
- #define   AR8XXX_PORT_STATUS_LINK_AUTO	BIT(9)
- #define   AR8XXX_PORT_STATUS_LINK_PAUSE	BIT(10)
- 
-+#define AR8327_REG_PORT_HDR_CTRL(_i)		(0x9c + (_i * 4))
-+#define   AR8327_PORT_HDR_CTRL_RX_MASK		GENMASK(3, 2)
-+#define   AR8327_PORT_HDR_CTRL_RX_S		2
-+#define   AR8327_PORT_HDR_CTRL_TX_MASK		GENMASK(1, 0)
-+#define   AR8327_PORT_HDR_CTRL_TX_S		0
-+#define   AR8327_PORT_HDR_CTRL_ALL		2
-+#define   AR8327_PORT_HDR_CTRL_MGMT		1
-+#define   AR8327_PORT_HDR_CTRL_NONE		0
-+
-+#define AR8327_REG_GLOBAL_FW_CTRL0		0x620
-+#define   AR8327_GLOBAL_FW_CTRL0_CPU_PORT_EN	BIT(10)
-+
-+#define AR8327_REG_GLOBAL_FW_CTRL1		0x624
-+#define   AR8327_GLOBAL_FW_CTRL1_IGMP_DP_MASK	GENMASK(30, 24)
-+#define   AR8327_GLOBAL_FW_CTRL1_IGMP_DP_S	24
-+#define   AR8327_GLOBAL_FW_CTRL1_BC_DP_MASK	GENMASK(22, 16)
-+#define   AR8327_GLOBAL_FW_CTRL1_BC_DP_S	16
-+#define   AR8327_GLOBAL_FW_CTRL1_MC_DP_MASK	GENMASK(14, 8)
-+#define   AR8327_GLOBAL_FW_CTRL1_MC_DP_S	8
-+#define   AR8327_GLOBAL_FW_CTRL1_UC_DP_MASK	GENMASK(6, 0)
-+#define   AR8327_GLOBAL_FW_CTRL1_UC_DP_S	0
-+
- #define AR8327_PORT_LOOKUP_CTRL(_i)		(0x660 + (_i) * 0xc)
- #define   AR8327_PORT_LOOKUP_MEMBER		GENMASK(6, 0)
- #define   AR8327_PORT_LOOKUP_IN_MODE		GENMASK(9, 8)
-
-From patchwork Fri May 29 01:42:21 2015
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [6/7] net: dsa: ar8xxx: add support for second xMII interfaces
- through DT
-From: Mathieu Olivari <mathieu@codeaurora.org>
-X-Patchwork-Id: 477525
-X-Patchwork-Delegate: davem@davemloft.net
-Message-Id: <1432863742-18427-7-git-send-email-mathieu@codeaurora.org>
-To: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
- ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
- davem@davemloft.net, mathieu@codeaurora.org, andrew@lunn.ch,
- f.fainelli@gmail.com, linux@roeck-us.net, gang.chen.5i5j@gmail.com,
- jiri@resnulli.us, leitec@staticky.com, fabf@skynet.be,
- alexander.h.duyck@intel.com, pavel.nakonechny@skitlab.ru,
- joe@perches.com, sfeldma@gmail.com, nbd@nbd.name, juhosg@openwrt.org
-Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
- netdev@vger.kernel.org
-Date: Thu, 28 May 2015 18:42:21 -0700
-
-This patch is adding support for port6 specific options to device tree.
-They can be used to setup the second xMII interface, and connect it to
-one of the switch port.
-
-Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
----
- drivers/net/dsa/ar8xxx.c | 50 ++++++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 50 insertions(+)
-
-diff --git a/drivers/net/dsa/ar8xxx.c b/drivers/net/dsa/ar8xxx.c
-index 4044614..7559249 100644
---- a/drivers/net/dsa/ar8xxx.c
-+++ b/drivers/net/dsa/ar8xxx.c
-@@ -19,6 +19,7 @@
- #include <net/dsa.h>
- #include <linux/phy.h>
- #include <linux/of_net.h>
-+#include <linux/of_platform.h>
- 
- #include "ar8xxx.h"
- 
-@@ -260,6 +261,9 @@ static int ar8xxx_set_pad_ctrl(struct dsa_switch *ds, int port, int mode)
- 		ar8xxx_write(ds, AR8327_REG_PORT5_PAD_CTRL,
- 			     AR8327_PORT_PAD_RGMII_RX_DELAY_EN);
- 		break;
-+	case PHY_INTERFACE_MODE_SGMII:
-+		ar8xxx_write(ds, reg, AR8327_PORT_PAD_SGMII_EN);
-+		break;
- 	default:
- 		pr_err("xMII mode %d not supported\n", mode);
- 		return -EINVAL;
-@@ -268,6 +272,48 @@ static int ar8xxx_set_pad_ctrl(struct dsa_switch *ds, int port, int mode)
- 	return 0;
- }
- 
-+static int ar8xxx_of_setup(struct dsa_switch *ds)
-+{
-+	struct device_node *dn = ds->pd->of_node;
-+	const char *s_phymode;
-+	int ret, mode;
-+	u32 phy_id, ctrl;
-+
-+	/* If port6-phy-mode property exists, configure it accordingly */
-+	if (!of_property_read_string(dn, "qca,port6-phy-mode", &s_phymode)) {
-+		for (mode = 0; mode < PHY_INTERFACE_MODE_MAX; mode++)
-+			if (!strcasecmp(s_phymode, phy_modes(mode)))
-+				break;
-+
-+		if (mode == PHY_INTERFACE_MODE_MAX)
-+			pr_err("Unknown phy-mode: \"%s\"\n", s_phymode);
-+
-+		ret = ar8xxx_set_pad_ctrl(ds, 6, mode);
-+		if (ret < 0)
-+			return ret;
-+	}
-+
-+	/* If a phy ID is specified for PORT6 mac, connect them together */
-+	if (!of_property_read_u32(dn, "qca,port6-phy-id", &phy_id)) {
-+		ar8xxx_rmw(ds, AR8327_PORT_LOOKUP_CTRL(6),
-+			   AR8327_PORT_LOOKUP_MEMBER, BIT(phy_to_port(phy_id)));
-+		ar8xxx_rmw(ds, AR8327_PORT_LOOKUP_CTRL(phy_to_port(phy_id)),
-+			   AR8327_PORT_LOOKUP_MEMBER, BIT(6));
-+
-+		/* We want the switch to be pass-through and act like a PHY on
-+		 * these ports. So BC/MC/UC & IGMP frames need to be accepted
-+		 */
-+		ctrl = BIT(phy_to_port(phy_id)) | BIT(6);
-+		ar8xxx_reg_set(ds, AR8327_REG_GLOBAL_FW_CTRL1,
-+			       ctrl << AR8327_GLOBAL_FW_CTRL1_IGMP_DP_S |
-+			       ctrl << AR8327_GLOBAL_FW_CTRL1_BC_DP_S |
-+			       ctrl << AR8327_GLOBAL_FW_CTRL1_MC_DP_S |
-+			       ctrl << AR8327_GLOBAL_FW_CTRL1_UC_DP_S);
-+	}
-+
-+	return 0;
-+}
-+
- static int ar8xxx_setup(struct dsa_switch *ds)
- {
- 	struct ar8xxx_priv *priv = ds_to_priv(ds);
-@@ -341,6 +387,10 @@ static int ar8xxx_setup(struct dsa_switch *ds)
- 		}
- 	}
- 
-+	ret = ar8xxx_of_setup(ds);
-+	if (ret < 0)
-+		return ret;
-+
- 	return 0;
- }
- 
-
-From patchwork Fri May 29 01:42:22 2015
-Content-Type: text/plain; charset="utf-8"
-MIME-Version: 1.0
-Content-Transfer-Encoding: 7bit
-Subject: [7/7] Documentation: devicetree: add ar8xxx binding
-From: Mathieu Olivari <mathieu@codeaurora.org>
-X-Patchwork-Id: 477528
-X-Patchwork-Delegate: davem@davemloft.net
-Message-Id: <1432863742-18427-8-git-send-email-mathieu@codeaurora.org>
-To: robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
- ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
- davem@davemloft.net, mathieu@codeaurora.org, andrew@lunn.ch,
- f.fainelli@gmail.com, linux@roeck-us.net, gang.chen.5i5j@gmail.com,
- jiri@resnulli.us, leitec@staticky.com, fabf@skynet.be,
- alexander.h.duyck@intel.com, pavel.nakonechny@skitlab.ru,
- joe@perches.com, sfeldma@gmail.com, nbd@nbd.name, juhosg@openwrt.org
-Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
- netdev@vger.kernel.org
-Date: Thu, 28 May 2015 18:42:22 -0700
-
-Add device-tree binding for ar8xxx switch families.
-
-Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
----
- .../devicetree/bindings/net/dsa/qca-ar8xxx.txt     | 70 ++++++++++++++++++++++
- 1 file changed, 70 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/net/dsa/qca-ar8xxx.txt
-
-diff --git a/Documentation/devicetree/bindings/net/dsa/qca-ar8xxx.txt b/Documentation/devicetree/bindings/net/dsa/qca-ar8xxx.txt
-new file mode 100644
-index 0000000..f4fd3f1
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/net/dsa/qca-ar8xxx.txt
 @@ -0,0 +1,70 @@
diff --git a/target/linux/ipq806x/patches-4.4/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch b/target/linux/ipq806x/patches-4.4/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch
index 691ebb66ba..d85d8b02aa 100644
--- a/target/linux/ipq806x/patches-4.4/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch
+++ b/target/linux/ipq806x/patches-4.4/708-ARM-dts-qcom-add-gmac-nodes-to-ipq806x-platforms.patch
@@ -121,7 +121,7 @@ Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
  };
 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
-@@ -763,6 +763,92 @@
+@@ -755,6 +755,92 @@
  
  			status = "disabled";
  		};
diff --git a/target/linux/ipq806x/patches-4.4/709-spi-qup-Fix-fifo-and-dma-support-for-IPQ806x.patch b/target/linux/ipq806x/patches-4.4/709-spi-qup-Fix-fifo-and-dma-support-for-IPQ806x.patch
index 8c4718e2a6..fa78a0aeda 100644
--- a/target/linux/ipq806x/patches-4.4/709-spi-qup-Fix-fifo-and-dma-support-for-IPQ806x.patch
+++ b/target/linux/ipq806x/patches-4.4/709-spi-qup-Fix-fifo-and-dma-support-for-IPQ806x.patch
@@ -8,8 +8,6 @@ Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
  drivers/spi/spi-qup.c | 54 +++++++++++++++++++++++++++++++++++++++++++++++++--
  1 file changed, 52 insertions(+), 2 deletions(-)
 
-diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
-index 810a7fa..0808017 100644
 --- a/drivers/spi/spi-qup.c
 +++ b/drivers/spi/spi-qup.c
 @@ -24,6 +24,7 @@
@@ -28,7 +26,7 @@ index 810a7fa..0808017 100644
  };
  
  
-@@ -370,7 +372,8 @@ static int spi_qup_do_pio(struct spi_master *master, struct spi_transfer *xfer)
+@@ -370,7 +372,8 @@ static int spi_qup_do_pio(struct spi_mas
  		return ret;
  	}
  
@@ -38,7 +36,7 @@ index 810a7fa..0808017 100644
  
  	return 0;
  }
-@@ -448,6 +451,7 @@ spi_qup_get_mode(struct spi_master *master, struct spi_transfer *xfer)
+@@ -448,6 +451,7 @@ spi_qup_get_mode(struct spi_master *mast
  {
  	struct spi_qup *qup = spi_master_get_devdata(master);
  	u32 mode;
@@ -46,7 +44,7 @@ index 810a7fa..0808017 100644
  
  	qup->w_size = 4;
  
-@@ -458,6 +462,14 @@ spi_qup_get_mode(struct spi_master *master, struct spi_transfer *xfer)
+@@ -458,6 +462,14 @@ spi_qup_get_mode(struct spi_master *mast
  
  	qup->n_words = xfer->len / qup->w_size;
  
@@ -61,7 +59,7 @@ index 810a7fa..0808017 100644
  	if (qup->n_words <= (qup->in_fifo_sz / sizeof(u32)))
  		mode = QUP_IO_M_MODE_FIFO;
  	else
-@@ -491,7 +503,7 @@ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
+@@ -491,7 +503,7 @@ static int spi_qup_io_config(struct spi_
  		return -EIO;
  	}
  
@@ -70,7 +68,7 @@ index 810a7fa..0808017 100644
  	n_words = controller->n_words;
  
  	if (mode == QUP_IO_M_MODE_FIFO) {
-@@ -500,6 +512,7 @@ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
+@@ -500,6 +512,7 @@ static int spi_qup_io_config(struct spi_
  		/* must be zero for FIFO */
  		writel_relaxed(0, controller->base + QUP_MX_INPUT_CNT);
  		writel_relaxed(0, controller->base + QUP_MX_OUTPUT_CNT);
@@ -117,7 +115,7 @@ index 810a7fa..0808017 100644
  static int spi_qup_probe(struct platform_device *pdev)
  {
  	struct spi_master *master;
-@@ -846,6 +891,11 @@ static int spi_qup_probe(struct platform_device *pdev)
+@@ -846,6 +891,11 @@ static int spi_qup_probe(struct platform
  	if (of_device_is_compatible(dev->of_node, "qcom,spi-qup-v1.1.1"))
  		controller->qup_v1 = 1;
  
@@ -129,6 +127,3 @@ index 810a7fa..0808017 100644
  	spin_lock_init(&controller->lock);
  	init_completion(&controller->done);
  
--- 
-2.7.2
-
diff --git a/target/linux/ipq806x/patches-4.4/710-watchdog-qcom-set-WDT_BARK_TIME-register-offset-to-o.patch b/target/linux/ipq806x/patches-4.4/710-watchdog-qcom-set-WDT_BARK_TIME-register-offset-to-o.patch
index 7573c963a7..dde5822f16 100644
--- a/target/linux/ipq806x/patches-4.4/710-watchdog-qcom-set-WDT_BARK_TIME-register-offset-to-o.patch
+++ b/target/linux/ipq806x/patches-4.4/710-watchdog-qcom-set-WDT_BARK_TIME-register-offset-to-o.patch
@@ -18,8 +18,6 @@ Signed-off-by: Ram Chandra Jangir <rjangi@codeaurora.org>
  drivers/watchdog/qcom-wdt.c | 2 ++
  1 file changed, 2 insertions(+)
 
-diff --git a/drivers/watchdog/qcom-wdt.c b/drivers/watchdog/qcom-wdt.c
-index 773dcfa..002274a 100644
 --- a/drivers/watchdog/qcom-wdt.c
 +++ b/drivers/watchdog/qcom-wdt.c
 @@ -22,6 +22,7 @@
@@ -30,7 +28,7 @@ index 773dcfa..002274a 100644
  #define WDT_BITE_TIME	0x5C
  
  struct qcom_wdt {
-@@ -44,6 +45,7 @@ static int qcom_wdt_start(struct watchdog_device *wdd)
+@@ -44,6 +45,7 @@ static int qcom_wdt_start(struct watchdo
  
  	writel(0, wdt->base + WDT_EN);
  	writel(1, wdt->base + WDT_RST);
@@ -38,6 +36,3 @@ index 773dcfa..002274a 100644
  	writel(wdd->timeout * wdt->rate, wdt->base + WDT_BITE_TIME);
  	writel(1, wdt->base + WDT_EN);
  	return 0;
--- 
-2.7.2
-
diff --git a/target/linux/ipq806x/patches-4.4/711-stmmac-fix-ipq806x-DMA-configuration.patch b/target/linux/ipq806x/patches-4.4/711-stmmac-fix-ipq806x-DMA-configuration.patch
index c99f60768f..58400314c7 100644
--- a/target/linux/ipq806x/patches-4.4/711-stmmac-fix-ipq806x-DMA-configuration.patch
+++ b/target/linux/ipq806x/patches-4.4/711-stmmac-fix-ipq806x-DMA-configuration.patch
@@ -94,7 +94,7 @@
  	int limit;
 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-@@ -1639,9 +1639,11 @@ static int stmmac_init_dma_engine(struct
+@@ -1641,9 +1641,11 @@ static int stmmac_init_dma_engine(struct
  	int pbl = DEFAULT_DMA_PBL, fixed_burst = 0, burst_len = 0;
  	int mixed_burst = 0;
  	int atds = 0;
@@ -106,7 +106,7 @@
  		fixed_burst = priv->plat->dma_cfg->fixed_burst;
  		mixed_burst = priv->plat->dma_cfg->mixed_burst;
  		burst_len = priv->plat->dma_cfg->burst_len;
-@@ -1652,7 +1654,7 @@ static int stmmac_init_dma_engine(struct
+@@ -1654,7 +1656,7 @@ static int stmmac_init_dma_engine(struct
  
  	return priv->hw->dma->init(priv->ioaddr, pbl, fixed_burst, mixed_burst,
  				   burst_len, priv->dma_tx_phy,
diff --git a/target/linux/ipq806x/patches-4.4/800-devicetree.patch b/target/linux/ipq806x/patches-4.4/800-devicetree.patch
index 0081a28885..39f59d36c8 100644
--- a/target/linux/ipq806x/patches-4.4/800-devicetree.patch
+++ b/target/linux/ipq806x/patches-4.4/800-devicetree.patch
@@ -12,7 +12,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 
 --- a/arch/arm/boot/dts/Makefile
 +++ b/arch/arm/boot/dts/Makefile
-@@ -506,7 +506,12 @@
+@@ -506,7 +506,12 @@ dtb-$(CONFIG_ARCH_QCOM) += \
  	qcom-apq8084-ifc6540.dtb \
  	qcom-apq8084-mtp.dtb \
  	qcom-ipq8064-ap148.dtb \
diff --git a/target/linux/ipq806x/patches-4.4/996-ATAG_DTB_COMPAT_CMDLINE_MANGLE.patch b/target/linux/ipq806x/patches-4.4/996-ATAG_DTB_COMPAT_CMDLINE_MANGLE.patch
index 490886ee44..8d5cbf9102 100644
--- a/target/linux/ipq806x/patches-4.4/996-ATAG_DTB_COMPAT_CMDLINE_MANGLE.patch
+++ b/target/linux/ipq806x/patches-4.4/996-ATAG_DTB_COMPAT_CMDLINE_MANGLE.patch
@@ -18,7 +18,7 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
 
 --- a/arch/arm/Kconfig
 +++ b/arch/arm/Kconfig
-@@ -1927,6 +1927,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
+@@ -1928,6 +1928,17 @@ config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEN
  	  The command-line arguments provided by the boot loader will be
  	  appended to the the device tree bootargs property.
  
@@ -107,7 +107,7 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
  static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline)
  {
  	char cmdline[COMMAND_LINE_SIZE];
-@@ -85,12 +134,21 @@ static void merge_fdt_bootargs(void *fdt
+@@ -85,12 +140,21 @@ static void merge_fdt_bootargs(void *fdt
  
  	/* and append the ATAG_CMDLINE */
  	if (fdt_cmdline) {
@@ -129,7 +129,7 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
  	}
  	*ptr = '\0';
  
-@@ -147,7 +205,9 @@ int atags_to_fdt(void *atag_list, void *
+@@ -147,7 +211,9 @@ int atags_to_fdt(void *atag_list, void *
  			else
  				setprop_string(fdt, "/chosen", "bootargs",
  					       atag->u.cmdline.cmdline);
@@ -140,7 +140,7 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
  			if (memcount >= sizeof(mem_reg_property)/4)
  				continue;
  			if (!atag->u.mem.size)
-@@ -186,6 +246,10 @@ int atags_to_fdt(void *atag_list, void *
+@@ -186,6 +252,10 @@ int atags_to_fdt(void *atag_list, void *
  		setprop(fdt, "/memory", "reg", mem_reg_property,
  			4 * memcount * memsize);
  	}
@@ -164,7 +164,7 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
  static int kernel_init(void *);
  
  extern void init_IRQ(void);
-@@ -585,6 +589,18 @@ asmlinkage __visible void __init start_k
+@@ -560,6 +564,18 @@ asmlinkage __visible void __init start_k
  	page_alloc_init();
  
  	pr_notice("Kernel command line: %s\n", boot_command_line);