ipq806x: Add support for IPQ806x chip family

Patches are generated using the "format-patch" command from the
following location:
*https://www.codeaurora.org/cgit/quic/kernel/galak-msm/log/?h=apq_ipq_base
*rev=0771849495b4128cac2faf7d49c85c729fc48b20
Patches numbered 76/77/102/103 have already been integrated in 3.14.12,
so they're not in this list.

All these patches are either integrated are pending integration into
kernel.org, therefore these patches should go away once the kernel
gets upgraded to 3.16.

Support is currently limited to AP148 board but can be extended to other
platforms in the future.

These changes do not cover ethernet connectivity.

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 42334

1 files changed, 46 insertions, 0 deletions

diff --git a/target/linux/ipq806x/patches/0145-phy-qcom-Add-device-tree-bindings-information.patch b/target/linux/ipq806x/patches/0145-phy-qcom-Add-device-tree-bindings-information.patch
new file mode 100644
index 0000000000..1791228113
--- /dev/null
+++ b/target/linux/ipq806x/patches/0145-phy-qcom-Add-device-tree-bindings-information.patch
@@ -0,0 +1,46 @@
+From 37258bc8fe832e4c681593a864686f627f6d3455 Mon Sep 17 00:00:00 2001
+From: Kumar Gala <galak@codeaurora.org>
+Date: Tue, 10 Jun 2014 13:09:01 -0500
+Subject: [PATCH 145/182] phy: qcom: Add device tree bindings information
+
+Add binding spec for Qualcomm SoC PHYs, starting with the SATA PHY on
+the IPQ806x family of SoCs.
+
+Signed-off-by: Kumar Gala <galak@codeaurora.org>
+---
+ Documentation/devicetree/bindings/phy/qcom-phy.txt |   23 ++++++++++++++++++++
+ 1 file changed, 23 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/phy/qcom-phy.txt
+
+diff --git a/Documentation/devicetree/bindings/phy/qcom-phy.txt b/Documentation/devicetree/bindings/phy/qcom-phy.txt
+new file mode 100644
+index 0000000..76bfbd0
+--- /dev/null
++++ b/Documentation/devicetree/bindings/phy/qcom-phy.txt
+@@ -0,0 +1,23 @@
++Qualcomm IPQ806x SATA PHY Controller
++------------------------------------
++
++SATA PHY nodes are defined to describe on-chip SATA Physical layer controllers.
++Each SATA PHY controller should have its own node.
++
++Required properties:
++- compatible: compatible list, contains "qcom,ipq806x-sata-phy"
++- reg: offset and length of the SATA PHY register set;
++- #phy-cells: must be zero
++- clocks: must be exactly one entry
++- clock-names: must be "cfg"
++
++Example:
++	sata_phy: sata-phy@1b400000 {
++		compatible = "qcom,ipq806x-sata-phy";
++		reg = <0x1b400000 0x200>;
++
++		clocks = <&gcc SATA_PHY_CFG_CLK>;
++		clock-names = "cfg";
++
++		#phy-cells = <0>;
++	};
+-- 
+1.7.10.4
+