ipq806x: Add support for IPQ806x chip family

Patches are generated using the "format-patch" command from the
following location:
*https://www.codeaurora.org/cgit/quic/kernel/galak-msm/log/?h=apq_ipq_base
*rev=0771849495b4128cac2faf7d49c85c729fc48b20
Patches numbered 76/77/102/103 have already been integrated in 3.14.12,
so they're not in this list.

All these patches are either integrated are pending integration into
kernel.org, therefore these patches should go away once the kernel
gets upgraded to 3.16.

Support is currently limited to AP148 board but can be extended to other
platforms in the future.

These changes do not cover ethernet connectivity.

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 42334

1 files changed, 90 insertions, 0 deletions

diff --git a/target/linux/ipq806x/patches/0133-spi-qup-Remove-chip-select-function.patch b/target/linux/ipq806x/patches/0133-spi-qup-Remove-chip-select-function.patch
new file mode 100644
index 0000000000..3881064b6b
--- /dev/null
+++ b/target/linux/ipq806x/patches/0133-spi-qup-Remove-chip-select-function.patch
@@ -0,0 +1,90 @@
+From 9bc674f40f22596ef8c2ff6d7f9e53da0baa57e9 Mon Sep 17 00:00:00 2001
+From: Andy Gross <agross@codeaurora.org>
+Date: Thu, 12 Jun 2014 14:34:10 -0500
+Subject: [PATCH 133/182] spi: qup: Remove chip select function
+
+This patch removes the chip select function.  Chip select should instead be
+supported using GPIOs, defining the DT entry "cs-gpios", and letting the SPI
+core assert/deassert the chip select as it sees fit.
+
+Signed-off-by: Andy Gross <agross@codeaurora.org>
+---
+ .../devicetree/bindings/spi/qcom,spi-qup.txt       |    6 ++++
+ drivers/spi/spi-qup.c                              |   33 ++++----------------
+ 2 files changed, 12 insertions(+), 27 deletions(-)
+
+diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt b/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
+index b82a268..bee6ff2 100644
+--- a/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
++++ b/Documentation/devicetree/bindings/spi/qcom,spi-qup.txt
+@@ -23,6 +23,12 @@ Optional properties:
+ - spi-max-frequency: Specifies maximum SPI clock frequency,
+                      Units - Hz. Definition as per
+                      Documentation/devicetree/bindings/spi/spi-bus.txt
++- num-cs:	total number of chipselects
++- cs-gpios:	should specify GPIOs used for chipselects.
++		The gpios will be referred to as reg = <index> in the SPI child
++		nodes.  If unspecified, a single SPI device without a chip
++		select can be used.
++
+ 
+ SPI slave nodes must be children of the SPI master node and can contain
+ properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
+diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
+index 65bf18e..dc128ac 100644
+--- a/drivers/spi/spi-qup.c
++++ b/drivers/spi/spi-qup.c
+@@ -424,31 +424,6 @@ static int spi_qup_io_config(struct spi_device *spi, struct spi_transfer *xfer)
+ 	return 0;
+ }
+ 
+-static void spi_qup_set_cs(struct spi_device *spi, bool enable)
+-{
+-	struct spi_qup *controller = spi_master_get_devdata(spi->master);
+-
+-	u32 iocontol, mask;
+-
+-	iocontol = readl_relaxed(controller->base + SPI_IO_CONTROL);
+-
+-	/* Disable auto CS toggle and use manual */
+-	iocontol &= ~SPI_IO_C_MX_CS_MODE;
+-	iocontol |= SPI_IO_C_FORCE_CS;
+-
+-	iocontol &= ~SPI_IO_C_CS_SELECT_MASK;
+-	iocontol |= SPI_IO_C_CS_SELECT(spi->chip_select);
+-
+-	mask = SPI_IO_C_CS_N_POLARITY_0 << spi->chip_select;
+-
+-	if (enable)
+-		iocontol |= mask;
+-	else
+-		iocontol &= ~mask;
+-
+-	writel_relaxed(iocontol, controller->base + SPI_IO_CONTROL);
+-}
+-
+ static int spi_qup_transfer_one(struct spi_master *master,
+ 			      struct spi_device *spi,
+ 			      struct spi_transfer *xfer)
+@@ -571,12 +546,16 @@ static int spi_qup_probe(struct platform_device *pdev)
+ 		return -ENOMEM;
+ 	}
+ 
++	/* use num-cs unless not present or out of range */
++	if (of_property_read_u16(dev->of_node, "num-cs",
++			&master->num_chipselect) ||
++			(master->num_chipselect > SPI_NUM_CHIPSELECTS))
++		master->num_chipselect = SPI_NUM_CHIPSELECTS;
++
+ 	master->bus_num = pdev->id;
+ 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LOOP;
+-	master->num_chipselect = SPI_NUM_CHIPSELECTS;
+ 	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
+ 	master->max_speed_hz = max_freq;
+-	master->set_cs = spi_qup_set_cs;
+ 	master->transfer_one = spi_qup_transfer_one;
+ 	master->dev.of_node = pdev->dev.of_node;
+ 	master->auto_runtime_pm = true;
+-- 
+1.7.10.4
+