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author | John Crispin <blogic@openwrt.org> | 2015-02-11 10:09:23 +0000 |
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committer | John Crispin <blogic@openwrt.org> | 2015-02-11 10:09:23 +0000 |
commit | 74dc0649ff0097f75faa26f4b85e61e334b458a4 (patch) | |
tree | 7816568a18d29fffe8df1bf103d8c47aa2e225a0 /target/linux/ipq806x/patches/0002-ARM-msm-Remove-pen_release-usage.patch | |
parent | 32c88d568cd4e7fc2ec035dff1ae51d3740cabf7 (diff) | |
download | upstream-74dc0649ff0097f75faa26f4b85e61e334b458a4.tar.gz upstream-74dc0649ff0097f75faa26f4b85e61e334b458a4.tar.bz2 upstream-74dc0649ff0097f75faa26f4b85e61e334b458a4.zip |
ipq806x: update target to v3.18
Patches in the ipq806x/patches folder were out of tree in v3.14. The
newest patch at the time was from June, so we can safely assume that
either the patches have been merged, or they have been rejected for
a good reason. If patches are seen missing, we'll cherry-pick them
on a per-needed basis.
This new kernel have been tested on AP148, which seems to works fine.
Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44386 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ipq806x/patches/0002-ARM-msm-Remove-pen_release-usage.patch')
-rw-r--r-- | target/linux/ipq806x/patches/0002-ARM-msm-Remove-pen_release-usage.patch | 211 |
1 files changed, 0 insertions, 211 deletions
diff --git a/target/linux/ipq806x/patches/0002-ARM-msm-Remove-pen_release-usage.patch b/target/linux/ipq806x/patches/0002-ARM-msm-Remove-pen_release-usage.patch deleted file mode 100644 index 19eaae62e5..0000000000 --- a/target/linux/ipq806x/patches/0002-ARM-msm-Remove-pen_release-usage.patch +++ /dev/null @@ -1,211 +0,0 @@ -From 18d53dfa103e63154fb8e548d55016d6ad210d28 Mon Sep 17 00:00:00 2001 -From: Rohit Vaswani <rvaswani@codeaurora.org> -Date: Fri, 21 Jun 2013 12:17:37 -0700 -Subject: [PATCH 002/182] ARM: msm: Remove pen_release usage - -pen_release is no longer required as the synchronization -is now managed by generic arm code. -This is done as suggested in https://lkml.org/lkml/2013/6/4/184 - -Cc: Russell King <linux@arm.linux.org.uk> -Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org> -Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> -Signed-off-by: Kumar Gala <galak@codeaurora.org> ---- - arch/arm/mach-msm/Makefile | 2 +- - arch/arm/mach-msm/headsmp.S | 39 --------------------------------------- - arch/arm/mach-msm/hotplug.c | 31 ++++--------------------------- - arch/arm/mach-msm/platsmp.c | 37 +++---------------------------------- - 4 files changed, 8 insertions(+), 101 deletions(-) - delete mode 100644 arch/arm/mach-msm/headsmp.S - ---- a/arch/arm/mach-msm/Makefile -+++ b/arch/arm/mach-msm/Makefile -@@ -19,7 +19,7 @@ obj-$(CONFIG_MSM_SCM) += scm.o scm-boot. - CFLAGS_scm.o :=$(call as-instr,.arch_extension sec,-DREQUIRES_SEC=1) - - obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o --obj-$(CONFIG_SMP) += headsmp.o platsmp.o -+obj-$(CONFIG_SMP) += platsmp.o - - obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o devices-msm7x00.o - obj-$(CONFIG_MACH_TROUT) += board-trout.o board-trout-gpio.o board-trout-mmc.o board-trout-panel.o devices-msm7x00.o ---- a/arch/arm/mach-msm/headsmp.S -+++ /dev/null -@@ -1,39 +0,0 @@ --/* -- * linux/arch/arm/mach-realview/headsmp.S -- * -- * Copyright (c) 2003 ARM Limited -- * All Rights Reserved -- * -- * This program is free software; you can redistribute it and/or modify -- * it under the terms of the GNU General Public License version 2 as -- * published by the Free Software Foundation. -- */ --#include <linux/linkage.h> --#include <linux/init.h> -- --/* -- * MSM specific entry point for secondary CPUs. This provides -- * a "holding pen" into which all secondary cores are held until we're -- * ready for them to initialise. -- */ --ENTRY(msm_secondary_startup) -- mrc p15, 0, r0, c0, c0, 5 -- and r0, r0, #15 -- adr r4, 1f -- ldmia r4, {r5, r6} -- sub r4, r4, r5 -- add r6, r6, r4 --pen: ldr r7, [r6] -- cmp r7, r0 -- bne pen -- -- /* -- * we've been released from the holding pen: secondary_stack -- * should now contain the SVC stack for this core -- */ -- b secondary_startup --ENDPROC(msm_secondary_startup) -- -- .align --1: .long . -- .long pen_release ---- a/arch/arm/mach-msm/hotplug.c -+++ b/arch/arm/mach-msm/hotplug.c -@@ -24,33 +24,10 @@ static inline void cpu_leave_lowpower(vo - - static inline void platform_do_lowpower(unsigned int cpu) - { -- /* Just enter wfi for now. TODO: Properly shut off the cpu. */ -- for (;;) { -- /* -- * here's the WFI -- */ -- asm("wfi" -- : -- : -- : "memory", "cc"); -- -- if (pen_release == cpu_logical_map(cpu)) { -- /* -- * OK, proper wakeup, we're done -- */ -- break; -- } -- -- /* -- * getting here, means that we have come out of WFI without -- * having been woken up - this shouldn't happen -- * -- * The trouble is, letting people know about this is not really -- * possible, since we are currently running incoherently, and -- * therefore cannot safely call printk() or anything else -- */ -- pr_debug("CPU%u: spurious wakeup call\n", cpu); -- } -+ asm("wfi" -+ : -+ : -+ : "memory", "cc"); - } - - /* ---- a/arch/arm/mach-msm/platsmp.c -+++ b/arch/arm/mach-msm/platsmp.c -@@ -12,13 +12,10 @@ - #include <linux/errno.h> - #include <linux/delay.h> - #include <linux/device.h> --#include <linux/jiffies.h> - #include <linux/smp.h> - #include <linux/io.h> - --#include <asm/cacheflush.h> - #include <asm/cputype.h> --#include <asm/mach-types.h> - #include <asm/smp_plat.h> - - #include "scm-boot.h" -@@ -28,7 +25,7 @@ - #define SCSS_CPU1CORE_RESET 0xD80 - #define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64 - --extern void msm_secondary_startup(void); -+extern void secondary_startup(void); - - static DEFINE_SPINLOCK(boot_lock); - -@@ -41,13 +38,6 @@ static inline int get_core_count(void) - static void msm_secondary_init(unsigned int cpu) - { - /* -- * let the primary processor know we're out of the -- * pen, then head off into the C entry point -- */ -- pen_release = -1; -- smp_wmb(); -- -- /* - * Synchronise with the boot thread. - */ - spin_lock(&boot_lock); -@@ -57,7 +47,7 @@ static void msm_secondary_init(unsigned - static void prepare_cold_cpu(unsigned int cpu) - { - int ret; -- ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup), -+ ret = scm_set_boot_addr(virt_to_phys(secondary_startup), - SCM_FLAG_COLDBOOT_CPU1); - if (ret == 0) { - void __iomem *sc1_base_ptr; -@@ -75,7 +65,6 @@ static void prepare_cold_cpu(unsigned in - - static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle) - { -- unsigned long timeout; - static int cold_boot_done; - - /* Only need to bring cpu out of reset this way once */ -@@ -91,39 +80,19 @@ static int msm_boot_secondary(unsigned i - spin_lock(&boot_lock); - - /* -- * The secondary processor is waiting to be released from -- * the holding pen - release it, then wait for it to flag -- * that it has been released by resetting pen_release. -- * -- * Note that "pen_release" is the hardware CPU ID, whereas -- * "cpu" is Linux's internal ID. -- */ -- pen_release = cpu_logical_map(cpu); -- sync_cache_w(&pen_release); -- -- /* - * Send the secondary CPU a soft interrupt, thereby causing - * the boot monitor to read the system wide flags register, - * and branch to the address found there. - */ - arch_send_wakeup_ipi_mask(cpumask_of(cpu)); - -- timeout = jiffies + (1 * HZ); -- while (time_before(jiffies, timeout)) { -- smp_rmb(); -- if (pen_release == -1) -- break; -- -- udelay(10); -- } -- - /* - * now the secondary core is starting up let it run its - * calibrations, then wait for it to finish - */ - spin_unlock(&boot_lock); - -- return pen_release != -1 ? -ENOSYS : 0; -+ return 0; - } - - /* |