diff options
author | Paul Spooren <mail@aparcar.org> | 2021-10-01 11:27:12 -1000 |
---|---|---|
committer | Adrian Schmutzler <freifunk@adrianschmutzler.de> | 2021-10-02 18:15:23 +0200 |
commit | b48d30521d4d2f90af50b06c7cf95dd6a24acd35 (patch) | |
tree | 3c574e09fdbf17b1d719ce8096b43506d18fb9e3 /target/linux/ipq806x/patches-5.4/851-add-gsbi1-dts.patch | |
parent | cac2ca1d4300a52f5d1d4ef603f0cdcc62c1e2e2 (diff) | |
download | upstream-b48d30521d4d2f90af50b06c7cf95dd6a24acd35.tar.gz upstream-b48d30521d4d2f90af50b06c7cf95dd6a24acd35.tar.bz2 upstream-b48d30521d4d2f90af50b06c7cf95dd6a24acd35.zip |
ipq806x: remove obsolete Kernel 5.4
With the upgrade to Kernel 5.10 per default the old version is no longer
required to be in tree.
Signed-off-by: Paul Spooren <mail@aparcar.org>
Diffstat (limited to 'target/linux/ipq806x/patches-5.4/851-add-gsbi1-dts.patch')
-rw-r--r-- | target/linux/ipq806x/patches-5.4/851-add-gsbi1-dts.patch | 44 |
1 files changed, 0 insertions, 44 deletions
diff --git a/target/linux/ipq806x/patches-5.4/851-add-gsbi1-dts.patch b/target/linux/ipq806x/patches-5.4/851-add-gsbi1-dts.patch deleted file mode 100644 index a123189804..0000000000 --- a/target/linux/ipq806x/patches-5.4/851-add-gsbi1-dts.patch +++ /dev/null @@ -1,44 +0,0 @@ ---- a/arch/arm/boot/dts/qcom-ipq8064.dtsi -+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi -@@ -894,6 +894,41 @@ - reg = <0x12100000 0x10000>; - }; - -+ gsbi1: gsbi@12440000 { -+ compatible = "qcom,gsbi-v1.0.0"; -+ cell-index = <1>; -+ reg = <0x12440000 0x100>; -+ clocks = <&gcc GSBI1_H_CLK>; -+ clock-names = "iface"; -+ #address-cells = <1>; -+ #size-cells = <1>; -+ ranges; -+ status = "disabled"; -+ -+ syscon-tcsr = <&tcsr>; -+ -+ gsbi1_serial: serial@12450000 { -+ compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; -+ reg = <0x12450000 0x100>, -+ <0x12400000 0x03>; -+ interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>; -+ clock-names = "core", "iface"; -+ status = "disabled"; -+ }; -+ -+ gsbi1_i2c: i2c@12460000 { -+ compatible = "qcom,i2c-qup-v1.1.1"; -+ reg = <0x12460000 0x1000>; -+ interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; -+ clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>; -+ clock-names = "core", "iface"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ }; -+ }; -+ - gsbi2: gsbi@12480000 { - compatible = "qcom,gsbi-v1.0.0"; - cell-index = <2>; |